Lines Matching +full:command +full:- +full:sequencer

1 //==- RISCVSchedSiFive7.td - SiFive7 Scheduling Definitions --*- tablegen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
104   // We can calculate ceil(a/b) using (a + b - 1) / b.
197   let MicroOpBufferSize = 0; // Explicitly set to zero since SiFive7 is in-order.
198   let IssueWidth = 2;        // 2 micro-ops are dispatched per cycle.
220 def SiFive7VA          : ProcResource<1>; // Arithmetic sequencer
221 def SiFive7VL          : ProcResource<1>; // Load sequencer
222 def SiFive7VS          : ProcResource<1>; // Store sequencer
225 // per cycle, in order, as soon as the sequencer for that type of instruction is
228 // time. The actual dequeueing into the sequencer is modeled by the VA, VL, and
229 // VS sequencer resources below. Each of them will only accept a single
232 def SiFive7VCQ         : ProcResource<1>; // Vector Command Queue
288 // Rotates are in the late-B ALU.
294 // clz[w]/ctz[w] are in the late-B ALU.
304 // orc.b is in the late-B ALU.
307 // min/max are in the late-B ALU
310 // rev8 is in the late-A and late-B ALUs.
313 // shNadd[.uw] is on the early-B and late-B ALUs.
318 // Single-bit instructions
444 // 6. Configuration-Setting Instructions
452 // Unit-stride loads and stores can operate at the full bandwidth of the memory
578 // Unit-stride segmented loads and stores are effectively converted into strided
594     foreach nf=3-8 in {
608   foreach nf=2-8 in {
705 // 12. Vector Fixed-Point Arithmetic Instructions
733 // 13. Vector Floating-Point Instructions
972 // [1] https://github.com/llvm/llvm-project/issues/83391
1014 //===----------------------------------------------------------------------===//
1118 // Single-bit instructions
1122 // 6. Configuration-Setting Instructions
1194 // 13. Vector Fixed-Point Arithmetic Instructions
1206 // 14. Vector Floating-Point Instructions
1297 //===----------------------------------------------------------------------===//