96   unsigned MCOpcode = RISCV::getRVVMCOpcode(MI.getOpcode());  in vectorPseudoHasAllNBitUsers()
112       RISCV::getVectorLowDemandedScalarBits(MCOpcode, Log2SEW);  in vectorPseudoHasAllNBitUsers()
154       case RISCV::ADDIW:  in hasAllNBitUsers()
155       case RISCV::ADDW:  in hasAllNBitUsers()
156       case RISCV::DIVUW:  in hasAllNBitUsers()
157       case RISCV::DIVW:  in hasAllNBitUsers()
158       case RISCV::MULW:  in hasAllNBitUsers()
159       case RISCV::REMUW:  in hasAllNBitUsers()
160       case RISCV::REMW:  in hasAllNBitUsers()
161       case RISCV::SLLIW:  in hasAllNBitUsers()
162       case RISCV::SLLW:  in hasAllNBitUsers()
163       case RISCV::SRAIW:  in hasAllNBitUsers()
164       case RISCV::SRAW:  in hasAllNBitUsers()
165       case RISCV::SRLIW:  in hasAllNBitUsers()
166       case RISCV::SRLW:  in hasAllNBitUsers()
167       case RISCV::SUBW:  in hasAllNBitUsers()
168       case RISCV::ROLW:  in hasAllNBitUsers()
169       case RISCV::RORW:  in hasAllNBitUsers()
170       case RISCV::RORIW:  in hasAllNBitUsers()
171       case RISCV::CLZW:  in hasAllNBitUsers()
172       case RISCV::CTZW:  in hasAllNBitUsers()
173       case RISCV::CPOPW:  in hasAllNBitUsers()
174       case RISCV::SLLI_UW:  in hasAllNBitUsers()
175       case RISCV::FMV_W_X:  in hasAllNBitUsers()
176       case RISCV::FCVT_H_W:  in hasAllNBitUsers()
177       case RISCV::FCVT_H_WU:  in hasAllNBitUsers()
178       case RISCV::FCVT_S_W:  in hasAllNBitUsers()
179       case RISCV::FCVT_S_WU:  in hasAllNBitUsers()
180       case RISCV::FCVT_D_W:  in hasAllNBitUsers()
181       case RISCV::FCVT_D_WU:  in hasAllNBitUsers()
185       case RISCV::SEXT_B:  in hasAllNBitUsers()
186       case RISCV::PACKH:  in hasAllNBitUsers()
190       case RISCV::SEXT_H:  in hasAllNBitUsers()
191       case RISCV::FMV_H_X:  in hasAllNBitUsers()
192       case RISCV::ZEXT_H_RV32:  in hasAllNBitUsers()
193       case RISCV::ZEXT_H_RV64:  in hasAllNBitUsers()
194       case RISCV::PACKW:  in hasAllNBitUsers()
199       case RISCV::PACK:  in hasAllNBitUsers()
204       case RISCV::SRLI: {  in hasAllNBitUsers()
218       case RISCV::SLLI:  in hasAllNBitUsers()
223       case RISCV::ANDI: {  in hasAllNBitUsers()
230       case RISCV::ORI: {  in hasAllNBitUsers()
238       case RISCV::SLL:  in hasAllNBitUsers()
239       case RISCV::BSET:  in hasAllNBitUsers()
240       case RISCV::BCLR:  in hasAllNBitUsers()
241       case RISCV::BINV:  in hasAllNBitUsers()
251       case RISCV::SRA:  in hasAllNBitUsers()
252       case RISCV::SRL:  in hasAllNBitUsers()
253       case RISCV::ROL:  in hasAllNBitUsers()
254       case RISCV::ROR:  in hasAllNBitUsers()
260       case RISCV::ADD_UW:  in hasAllNBitUsers()
261       case RISCV::SH1ADD_UW:  in hasAllNBitUsers()
262       case RISCV::SH2ADD_UW:  in hasAllNBitUsers()
263       case RISCV::SH3ADD_UW:  in hasAllNBitUsers()
270       case RISCV::BEXTI:  in hasAllNBitUsers()
275       case RISCV::SB:  in hasAllNBitUsers()
280       case RISCV::SH:  in hasAllNBitUsers()
285       case RISCV::SW:  in hasAllNBitUsers()
293       case RISCV::COPY:  in hasAllNBitUsers()
294       case RISCV::PHI:  in hasAllNBitUsers()
296       case RISCV::ADD:  in hasAllNBitUsers()
297       case RISCV::ADDI:  in hasAllNBitUsers()
298       case RISCV::AND:  in hasAllNBitUsers()
299       case RISCV::MUL:  in hasAllNBitUsers()
300       case RISCV::OR:  in hasAllNBitUsers()
301       case RISCV::SUB:  in hasAllNBitUsers()
302       case RISCV::XOR:  in hasAllNBitUsers()
303       case RISCV::XORI:  in hasAllNBitUsers()
305       case RISCV::ANDN:  in hasAllNBitUsers()
306       case RISCV::BREV8:  in hasAllNBitUsers()
307       case RISCV::CLMUL:  in hasAllNBitUsers()
308       case RISCV::ORC_B:  in hasAllNBitUsers()
309       case RISCV::ORN:  in hasAllNBitUsers()
310       case RISCV::SH1ADD:  in hasAllNBitUsers()
311       case RISCV::SH2ADD:  in hasAllNBitUsers()
312       case RISCV::SH3ADD:  in hasAllNBitUsers()
313       case RISCV::XNOR:  in hasAllNBitUsers()
314       case RISCV::BSETI:  in hasAllNBitUsers()
315       case RISCV::BCLRI:  in hasAllNBitUsers()
316       case RISCV::BINVI:  in hasAllNBitUsers()
320       case RISCV::PseudoCCMOVGPR:  in hasAllNBitUsers()
329       case RISCV::CZERO_EQZ:  in hasAllNBitUsers()
330       case RISCV::CZERO_NEZ:  in hasAllNBitUsers()
331       case RISCV::VT_MASKC:  in hasAllNBitUsers()
332       case RISCV::VT_MASKCN:  in hasAllNBitUsers()
362   case RISCV::SRAI:  in isSignExtendingOpW()
364   case RISCV::SRLI:  in isSignExtendingOpW()
367   case RISCV::ADDI:  in isSignExtendingOpW()
368     return MI.getOperand(1).isReg() && MI.getOperand(1).getReg() == RISCV::X0;  in isSignExtendingOpW()
370   case RISCV::ANDI:  in isSignExtendingOpW()
373   case RISCV::ORI:  in isSignExtendingOpW()
376   case RISCV::BSETI:  in isSignExtendingOpW()
378            MI.getOperand(1).getReg() == RISCV::X0;  in isSignExtendingOpW()
380   case RISCV::COPY:  in isSignExtendingOpW()
381     return MI.getOperand(1).getReg() == RISCV::X0;  in isSignExtendingOpW()
383   case RISCV::PseudoAtomicLoadNand32:  in isSignExtendingOpW()
385   case RISCV::PseudoVMV_X_S: {  in isSignExtendingOpW()
435     case RISCV::COPY: {  in isSignExtendedW()
449       if (CopySrcReg == RISCV::X10) {  in isSignExtendedW()
461             (--II)->getOpcode() != RISCV::ADJCALLSTACKUP)  in isSignExtendedW()
491     case RISCV::BCLRI:  in isSignExtendedW()
492     case RISCV::BINVI:  in isSignExtendedW()
493     case RISCV::BSETI:  in isSignExtendedW()
497     case RISCV::REM:  in isSignExtendedW()
498     case RISCV::ANDI:  in isSignExtendedW()
499     case RISCV::ORI:  in isSignExtendedW()
500     case RISCV::XORI:  in isSignExtendedW()
508     case RISCV::PseudoCCADDW:  in isSignExtendedW()
509     case RISCV::PseudoCCADDIW:  in isSignExtendedW()
510     case RISCV::PseudoCCSUBW:  in isSignExtendedW()
511     case RISCV::PseudoCCSLLW:  in isSignExtendedW()
512     case RISCV::PseudoCCSRLW:  in isSignExtendedW()
513     case RISCV::PseudoCCSRAW:  in isSignExtendedW()
514     case RISCV::PseudoCCSLLIW:  in isSignExtendedW()
515     case RISCV::PseudoCCSRLIW:  in isSignExtendedW()
516     case RISCV::PseudoCCSRAIW:  in isSignExtendedW()
522     case RISCV::REMU:  in isSignExtendedW()
523     case RISCV::AND:  in isSignExtendedW()
524     case RISCV::OR:  in isSignExtendedW()
525     case RISCV::XOR:  in isSignExtendedW()
526     case RISCV::ANDN:  in isSignExtendedW()
527     case RISCV::ORN:  in isSignExtendedW()
528     case RISCV::XNOR:  in isSignExtendedW()
529     case RISCV::MAX:  in isSignExtendedW()
530     case RISCV::MAXU:  in isSignExtendedW()
531     case RISCV::MIN:  in isSignExtendedW()
532     case RISCV::MINU:  in isSignExtendedW()
533     case RISCV::PseudoCCMOVGPR:  in isSignExtendedW()
534     case RISCV::PseudoCCAND:  in isSignExtendedW()
535     case RISCV::PseudoCCOR:  in isSignExtendedW()
536     case RISCV::PseudoCCXOR:  in isSignExtendedW()
537     case RISCV::PHI: {  in isSignExtendedW()
547       case RISCV::PHI:  in isSignExtendedW()
551       case RISCV::PseudoCCMOVGPR:  in isSignExtendedW()
555       case RISCV::PseudoCCAND:  in isSignExtendedW()
556       case RISCV::PseudoCCOR:  in isSignExtendedW()
557       case RISCV::PseudoCCXOR:  in isSignExtendedW()
574     case RISCV::CZERO_EQZ:  in isSignExtendedW()
575     case RISCV::CZERO_NEZ:  in isSignExtendedW()
576     case RISCV::VT_MASKC:  in isSignExtendedW()
577     case RISCV::VT_MASKCN:  in isSignExtendedW()
586     case RISCV::SLLI:  in isSignExtendedW()
591     case RISCV::ADDI:  in isSignExtendedW()
592     case RISCV::ADD:  in isSignExtendedW()
593     case RISCV::LD:  in isSignExtendedW()
594     case RISCV::LWU:  in isSignExtendedW()
595     case RISCV::MUL:  in isSignExtendedW()
596     case RISCV::SUB:  in isSignExtendedW()
612   case RISCV::ADDI:  in getWOp()
613     return RISCV::ADDIW;  in getWOp()
614   case RISCV::ADD:  in getWOp()
615     return RISCV::ADDW;  in getWOp()
616   case RISCV::LD:  in getWOp()
617   case RISCV::LWU:  in getWOp()
618     return RISCV::LW;  in getWOp()
619   case RISCV::MUL:  in getWOp()
620     return RISCV::MULW;  in getWOp()
621   case RISCV::SLLI:  in getWOp()
622     return RISCV::SLLIW;  in getWOp()
623   case RISCV::SUB:  in getWOp()
624     return RISCV::SUBW;  in getWOp()
641       if (!RISCV::isSEXT_W(MI))  in removeSExtWInstrs()
693       case RISCV::ADDW:  Opc = RISCV::ADD;  break;  in stripWSuffixes()
694       case RISCV::ADDIW: Opc = RISCV::ADDI; break;  in stripWSuffixes()
695       case RISCV::MULW:  Opc = RISCV::MUL;  break;  in stripWSuffixes()
696       case RISCV::SLLIW: Opc = RISCV::SLLI; break;  in stripWSuffixes()
721       case RISCV::ADD:  in appendWSuffixes()
722         WOpc = RISCV::ADDW;  in appendWSuffixes()
724       case RISCV::ADDI:  in appendWSuffixes()
725         WOpc = RISCV::ADDIW;  in appendWSuffixes()
727       case RISCV::SUB:  in appendWSuffixes()
728         WOpc = RISCV::SUBW;  in appendWSuffixes()
730       case RISCV::MUL:  in appendWSuffixes()
731         WOpc = RISCV::MULW;  in appendWSuffixes()
733       case RISCV::SLLI:  in appendWSuffixes()
737         WOpc = RISCV::SLLIW;  in appendWSuffixes()
739       case RISCV::LD:  in appendWSuffixes()
740       case RISCV::LWU:  in appendWSuffixes()
741         WOpc = RISCV::LW;  in appendWSuffixes()