Lines Matching full:vs2
35 bits<5> vs2;
43 let Inst{24-20} = vs2;
56 (ins VR:$vs2, uimm6:$imm, VMaskOp:$vm),
57 opcodestr # ".vi", "$vd, $vs2, $imm$vm">,
61 // op vd, vs2, vs1
67 // op vd, vs2, vs1
70 (ins VR:$vd, VR:$vs2, VR:$vs1),
71 opcodestr, "$vd, $vs2, $vs1"> {
77 // op vd, vs2, imm
84 // op vd, vs2, imm where vd is also a source regardless of tail policy
87 (ins VR:$vd, VR:$vs2, optype:$imm),
88 opcodestr, "$vd, $vs2, $imm"> {
95 // op vd, vs2 (use vs1 as instruction encoding) where vd is also a source
99 : RVInstV<funct6, vs1, opv, (outs VR:$vd_wb), (ins VR:$vd, VR:$vs2),
100 opcodestr, "$vd, $vs2"> {