Lines Matching full:rs1
47 // Conditional binops, that updates update $dst to (op rs1, rs2) when condition
55 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
60 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
65 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
70 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
75 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
80 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
85 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
90 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
96 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
101 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
106 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
111 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
116 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
121 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
126 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
133 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
138 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
143 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
148 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
153 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
159 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
164 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
169 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
174 GPR:$falsev, GPR:$rs1, simm12:$rs2), []>,
181 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
186 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
191 GPR:$falsev, GPR:$rs1, GPR:$rs2), []>,
197 def : Pat<(XLenVT (abs GPR:$rs1)),
198 (PseudoCCSUB (XLenVT GPR:$rs1), (XLenVT X0), /* COND_LT */ 2,
199 (XLenVT GPR:$rs1), (XLenVT X0), (XLenVT GPR:$rs1))>;
201 def : Pat<(sext_inreg (abs 33signbits_node:$rs1), i32),
202 (PseudoCCSUBW (i64 GPR:$rs1), (i64 X0), /* COND_LT */ 2,
203 (i64 GPR:$rs1), (i64 X0), (i64 GPR:$rs1))>;