Lines Matching full:incr
193 (ins GPR:$addr, GPR:$incr, ixlenimm:$ordering), []> {
202 (ins GPR:$addr, GPR:$incr, GPR:$mask, ixlenimm:$ordering), []> {
211 (ins GPR:$addr, GPR:$incr, GPR:$mask, ixlenimm:$sextshamt,
222 (ins GPR:$addr, GPR:$incr, GPR:$mask, ixlenimm:$ordering), []> {
231 : Pat<(intrin GPR:$addr, GPR:$incr, GPR:$mask, timm:$ordering),
232 (AMOInst GPR:$addr, GPR:$incr, GPR:$mask, timm:$ordering)>;
235 : Pat<(intrin GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
237 (AMOInst GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
246 def : Pat<(XLenVT (atomic_load_nand_i32_monotonic GPR:$addr, GPR:$incr)),
247 (PseudoAtomicLoadNand32 GPR:$addr, GPR:$incr, 2)>;
248 def : Pat<(XLenVT (atomic_load_nand_i32_acquire GPR:$addr, GPR:$incr)),
249 (PseudoAtomicLoadNand32 GPR:$addr, GPR:$incr, 4)>;
250 def : Pat<(XLenVT (atomic_load_nand_i32_release GPR:$addr, GPR:$incr)),
251 (PseudoAtomicLoadNand32 GPR:$addr, GPR:$incr, 5)>;
252 def : Pat<(XLenVT (atomic_load_nand_i32_acq_rel GPR:$addr, GPR:$incr)),
253 (PseudoAtomicLoadNand32 GPR:$addr, GPR:$incr, 6)>;
254 def : Pat<(XLenVT (atomic_load_nand_i32_seq_cst GPR:$addr, GPR:$incr)),
255 (PseudoAtomicLoadNand32 GPR:$addr, GPR:$incr, 7)>;
297 def : Pat<(i64 (atomic_load_nand_i64_monotonic GPR:$addr, GPR:$incr)),
298 (PseudoAtomicLoadNand64 GPR:$addr, GPR:$incr, 2)>;
299 def : Pat<(i64 (atomic_load_nand_i64_acquire GPR:$addr, GPR:$incr)),
300 (PseudoAtomicLoadNand64 GPR:$addr, GPR:$incr, 4)>;
301 def : Pat<(i64 (atomic_load_nand_i64_release GPR:$addr, GPR:$incr)),
302 (PseudoAtomicLoadNand64 GPR:$addr, GPR:$incr, 5)>;
303 def : Pat<(i64 (atomic_load_nand_i64_acq_rel GPR:$addr, GPR:$incr)),
304 (PseudoAtomicLoadNand64 GPR:$addr, GPR:$incr, 6)>;
305 def : Pat<(i64 (atomic_load_nand_i64_seq_cst GPR:$addr, GPR:$incr)),
306 (PseudoAtomicLoadNand64 GPR:$addr, GPR:$incr, 7)>;