Lines Matching refs:RISCVMachineCombinerPattern

2057     Patterns.push_back(IsFAdd ? RISCVMachineCombinerPattern::FMADD_AX
2058                               : RISCVMachineCombinerPattern::FMSUB);
2063     Patterns.push_back(IsFAdd ? RISCVMachineCombinerPattern::FMADD_XA
2064                               : RISCVMachineCombinerPattern::FNMSUB);
2144     Patterns.push_back(RISCVMachineCombinerPattern::SHXADD_ADD_SLLI_OP1);
2148     Patterns.push_back(RISCVMachineCombinerPattern::SHXADD_ADD_SLLI_OP2);
2157   case RISCVMachineCombinerPattern::FMADD_AX:
2158   case RISCVMachineCombinerPattern::FMADD_XA:
2159   case RISCVMachineCombinerPattern::FMSUB:
2160   case RISCVMachineCombinerPattern::FNMSUB:
2192     return Pattern == RISCVMachineCombinerPattern::FMSUB ? RISCV::FMSUB_H
2195     return Pattern == RISCVMachineCombinerPattern::FMSUB ? RISCV::FMSUB_S
2198     return Pattern == RISCVMachineCombinerPattern::FMSUB ? RISCV::FMSUB_D
2207   case RISCVMachineCombinerPattern::FMADD_AX:
2208   case RISCVMachineCombinerPattern::FMSUB:
2210   case RISCVMachineCombinerPattern::FMADD_XA:
2211   case RISCVMachineCombinerPattern::FNMSUB:
2331   case RISCVMachineCombinerPattern::FMADD_AX:
2332   case RISCVMachineCombinerPattern::FMSUB: {
2337   case RISCVMachineCombinerPattern::FMADD_XA:
2338   case RISCVMachineCombinerPattern::FNMSUB: {
2343   case RISCVMachineCombinerPattern::SHXADD_ADD_SLLI_OP1:
2346   case RISCVMachineCombinerPattern::SHXADD_ADD_SLLI_OP2: