Lines Matching refs:LMUL
252 // LMUL = 1/2/4/8. We should be able to convert vmv1r.v to vmv.v.v
253 // for fractional LMUL operations. However, we could not use the vsetvli
255 // 2 x LMUL.
271 // We only permit the source of COPY has the same LMUL as the defined
273 // There are cases we need to keep the whole register copy if the LMUL
289 // only checking the LMUL is insufficient due to reduction result is
349 // DstEncoding and SrcEncoding should be >= LMUL value we try to use to
395 // aligned to larger LMUL, we can eliminate some copyings.
3024 #define CASE_RVV_OPCODE_UNMASK_LMUL(OP, LMUL) \
3025 RISCV::Pseudo##OP##_##LMUL
3027 #define CASE_RVV_OPCODE_MASK_LMUL(OP, LMUL) \
3028 RISCV::Pseudo##OP##_##LMUL##_MASK
3030 #define CASE_RVV_OPCODE_LMUL(OP, LMUL) \
3031 CASE_RVV_OPCODE_UNMASK_LMUL(OP, LMUL): \
3032 case CASE_RVV_OPCODE_MASK_LMUL(OP, LMUL)
3068 #define CASE_VMA_OPCODE_COMMON(OP, TYPE, LMUL) \
3069 RISCV::PseudoV##OP##_##TYPE##_##LMUL
3090 #define CASE_VFMA_OPCODE_COMMON(OP, TYPE, LMUL, SEW) \
3091 RISCV::PseudoV##OP##_##TYPE##_##LMUL##_##SEW
3281 #define CASE_VMA_CHANGE_OPCODE_COMMON(OLDOP, NEWOP, TYPE, LMUL) \
3282 case RISCV::PseudoV##OLDOP##_##TYPE##_##LMUL: \
3283 Opc = RISCV::PseudoV##NEWOP##_##TYPE##_##LMUL; \
3310 #define CASE_VFMA_CHANGE_OPCODE_COMMON(OLDOP, NEWOP, TYPE, LMUL, SEW) \
3311 case RISCV::PseudoV##OLDOP##_##TYPE##_##LMUL##_##SEW: \
3312 Opc = RISCV::PseudoV##NEWOP##_##TYPE##_##LMUL##_##SEW; \
3481 #define CASE_WIDEOP_OPCODE_COMMON(OP, LMUL) \
3482 RISCV::PseudoV##OP##_##LMUL##_TIED
3495 #define CASE_WIDEOP_CHANGE_OPCODE_COMMON(OP, LMUL) \
3496 case RISCV::PseudoV##OP##_##LMUL##_TIED: \
3497 NewOpc = RISCV::PseudoV##OP##_##LMUL; \
3512 #define CASE_FP_WIDEOP_OPCODE_COMMON(OP, LMUL, SEW) \
3513 RISCV::PseudoV##OP##_##LMUL##_##SEW##_TIED
3526 #define CASE_FP_WIDEOP_CHANGE_OPCODE_COMMON(OP, LMUL, SEW) \
3527 case RISCV::PseudoV##OP##_##LMUL##_##SEW##_TIED: \
3528 NewOpc = RISCV::PseudoV##OP##_##LMUL##_##SEW; \