Lines Matching refs:LMUL
221 } LMUL = LMULNone; member
228 return SEW || LMUL || SEWLMULRatio || TailPolicy || MaskPolicy; in usedVTYPE()
239 LMUL = LMULEqual; in demandVTYPE()
263 LMUL = std::max(LMUL, B.LMUL); in doUnion()
298 switch (LMUL) { in print()
326 static bool isLMUL1OrSmaller(RISCVII::VLMUL LMUL) { in isLMUL1OrSmaller() argument
327 auto [LMul, Fractional] = RISCVVType::decodeVLMUL(LMUL); in isLMUL1OrSmaller()
354 switch (Used.LMUL) { in areCompatibleVTYPEs()
423 Res.LMUL = DemandedFields::LMULNone; in getDemanded()
438 Res.LMUL = DemandedFields::LMULNone; in getDemanded()
443 Res.LMUL = DemandedFields::LMULNone; in getDemanded()
464 Res.LMUL = DemandedFields::LMULNone; in getDemanded()
484 Res.LMUL = DemandedFields::LMULLessThanOrEqualToM1; in getDemanded()
496 Res.LMUL = DemandedFields::LMULLessThanOrEqualToM1; in getDemanded()
1196 if (!Demanded.LMUL && !Demanded.SEWLMULRatio && PrevInfo.isValid() && in adjustIncoming()
1201 Demanded.LMUL = DemandedFields::LMULEqual; in adjustIncoming()
1241 ((Demanded.LMUL || Demanded.SEWLMULRatio) ? IncomingInfo : Info) in transferBefore()