1 //===-- RISCVInsertReadWriteCSR.cpp - Insert Read/Write of RISC-V CSR -----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
8 // This file implements the machine function pass to insert read/write of CSR-s
9 // of the RISC-V instructions.
12 // -Writing and saving frm before an RVV floating-point instruction with a
15 //===----------------------------------------------------------------------===//
23 #define DEBUG_TYPE "riscv-insert-read-write-csr"
24 #define RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass"
27     DisableFRMInsertOpt("riscv-disable-frm-insert-opt", cl::init(false),
71   for (MachineInstr &MI : MBB) {  in INITIALIZE_PASS()
72     if (MI.getOpcode() == RISCV::SwapFRMImm ||  in INITIALIZE_PASS()
73         MI.getOpcode() == RISCV::WriteFRMImm) {  in INITIALIZE_PASS()
74       CurrentRM = MI.getOperand(0).getImm();  in INITIALIZE_PASS()
79     if (MI.getOpcode() == RISCV::WriteFRM) {  in INITIALIZE_PASS()
85     if (MI.isCall() || MI.isInlineAsm() ||  in INITIALIZE_PASS()
86         MI.readsRegister(RISCV::FRM, /*TRI=*/nullptr)) {  in INITIALIZE_PASS()
89         BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::WriteFRM))  in INITIALIZE_PASS()
96     assert(!MI.modifiesRegister(RISCV::FRM, /*TRI=*/nullptr) &&  in INITIALIZE_PASS()
97            "Expected that MI could not modify FRM.");  in INITIALIZE_PASS()
99     int FRMIdx = RISCVII::getFRMOpNum(MI.getDesc());  in INITIALIZE_PASS()
102     unsigned InstrRM = MI.getOperand(FRMIdx).getImm();  in INITIALIZE_PASS()
104     LastFRMChanger = &MI;  in INITIALIZE_PASS()
106     // Make MI implicit use FRM.  in INITIALIZE_PASS()
107     MI.addOperand(MachineOperand::CreateReg(RISCV::FRM, /*IsDef*/ false,  in INITIALIZE_PASS()
111     // Skip if MI uses same rounding mode as FRM.  in INITIALIZE_PASS()
117       MachineRegisterInfo *MRI = &MBB.getParent()->getRegInfo();  in INITIALIZE_PASS()
118       SavedFRM = MRI->createVirtualRegister(&RISCV::GPRRegClass);  in INITIALIZE_PASS()
119       BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::SwapFRMImm), SavedFRM)  in INITIALIZE_PASS()
123       BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::WriteFRMImm))  in INITIALIZE_PASS()
133         BuildMI(*MBB.getParent(), {}, TII->get(RISCV::WriteFRM))  in INITIALIZE_PASS()
145   for (MachineInstr &MI : MBB) {  in emitWriteRoundingMode()
146     int FRMIdx = RISCVII::getFRMOpNum(MI.getDesc());  in emitWriteRoundingMode()
150     unsigned FRMImm = MI.getOperand(FRMIdx).getImm();  in emitWriteRoundingMode()
159     MachineRegisterInfo *MRI = &MBB.getParent()->getRegInfo();  in emitWriteRoundingMode()
160     Register SavedFRM = MRI->createVirtualRegister(&RISCV::GPRRegClass);  in emitWriteRoundingMode()
161     BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::SwapFRMImm),  in emitWriteRoundingMode()
164     MI.addOperand(MachineOperand::CreateReg(RISCV::FRM, /*IsDef*/ false,  in emitWriteRoundingMode()
168         BuildMI(*MBB.getParent(), {}, TII->get(RISCV::WriteFRM))  in emitWriteRoundingMode()
170     MBB.insertAfter(MI, MIB);  in emitWriteRoundingMode()