Lines Matching refs:ZERO_EXTEND

835       setOperationAction({ISD::ANY_EXTEND, ISD::SIGN_EXTEND, ISD::ZERO_EXTEND},
1256             {ISD::ANY_EXTEND, ISD::SIGN_EXTEND, ISD::ZERO_EXTEND}, VT, Custom);
1491     setTargetDAGCombine({ISD::ZERO_EXTEND, ISD::FP_TO_SINT, ISD::FP_TO_UINT,
5098     V1 = DAG.getNode(ISD::ZERO_EXTEND, DL, WidenVT, V1);
5100                       : DAG.getNode(ISD::ZERO_EXTEND, DL, WidenVT, V2);
5484       Exp = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Exp);
6399   case ISD::ZERO_EXTEND:
6596                                  ? ISD::ZERO_EXTEND
8458     Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec);
8681     Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec);
8980   SDValue AVL = DAG.getNode(ISD::ZERO_EXTEND, DL, XLenVT, N->getOperand(1));
10051       Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVecVT, Vec);
10052       SubVec = DAG.getNode(ISD::ZERO_EXTEND, DL, ExtSubVecVT, SubVec);
10288       Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVecVT, Vec);
10430     WideOps.push_back(DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Op));
10653     SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, WidenVT, Op.getOperand(0));
11562   EVL1 = DAG.getNode(ISD::ZERO_EXTEND, DL, XLenVT, EVL1);
12111   RMValue = DAG.getNode(ISD::ZERO_EXTEND, DL, XLenVT, RMValue);
12403           DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N->getOperand(1));
12459                                            : ISD::ZERO_EXTEND;
13367   if (N0.getOpcode() != ISD::ZERO_EXTEND || N1.getOpcode() != ISD::ZERO_EXTEND)
13384   Src0 = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Src0), NarrowVT, Src0);
13385   Src1 = DAG.getNode(ISD::ZERO_EXTEND, SDLoc(Src1), NarrowVT, Src1);
13393       N->getOpcode() == ISD::SUB ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
13680     SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
13708     SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
13806     SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
14139   if (N0.getOpcode() != ISD::ZERO_EXTEND &&
14287     case ISD::ZERO_EXTEND:
14339     case ISD::ZERO_EXTEND:
14554     case ISD::ZERO_EXTEND:
14566       SupportsZExt = Opc == ISD::ZERO_EXTEND;
15944       CountZeroes.getOpcode() == ISD::ZERO_EXTEND)
16505       N1.getOpcode() != ISD::ZERO_EXTEND || !N1.hasOneUse())
16797       return DAG.getNode(ISD::ZERO_EXTEND, DL, VT,
16851   case ISD::ZERO_EXTEND:
21135   return Extend.getOpcode() == ISD::ZERO_EXTEND &&
21591   if (Opc == ISD::ZERO_EXTEND || Opc == ISD::SIGN_EXTEND)