Lines Matching refs:Setcc
9005 SDValue Setcc =
9008 return DAG.getSelect(DL, XLenVT, Setcc, VL, Res);
13849 SDValue Setcc = DAG.getSetCC(SDLoc(N00), N0.getOperand(0).getValueType(),
13851 return DAG.getNode(ISD::TRUNCATE, SDLoc(N0), N->getValueType(0), Setcc);
15724 SDValue Setcc = Cond.getOperand(0);
15727 if (Setcc.getOpcode() != ISD::SETCC)
15728 std::swap(Setcc, Xor);
15730 if (Setcc.getOpcode() != ISD::SETCC || !Setcc.hasOneUse() ||
15749 EVT SetCCOpVT = Setcc.getOperand(0).getValueType();
15753 ISD::CondCode CCVal = cast<CondCodeSDNode>(Setcc.getOperand(2))->get();
15756 Setcc = DAG.getSetCC(SDLoc(Setcc), VT, Setcc.getOperand(0),
15757 Setcc.getOperand(1), CCVal);
15758 } else if (CCVal == ISD::SETLT && isNullConstant(Setcc.getOperand(0))) {
15760 Setcc = DAG.getSetCC(SDLoc(Setcc), VT, Setcc.getOperand(1),
15761 DAG.getConstant(1, SDLoc(Setcc), VT), CCVal);
15762 } else if (CCVal == ISD::SETLT && isOneConstant(Setcc.getOperand(1))) {
15764 Setcc = DAG.getSetCC(SDLoc(Setcc), VT,
15765 DAG.getConstant(0, SDLoc(Setcc), VT),
15766 Setcc.getOperand(0), CCVal);
15771 return DAG.getNode(Opc, SDLoc(Cond), VT, Setcc, Xor.getOperand(0));