Lines Matching refs:N0
13161 SDValue N0 = N->getOperand(0);
13163 if (N0->getOpcode() != ISD::SHL || N1->getOpcode() != ISD::SHL ||
13164 !N0->hasOneUse() || !N1->hasOneUse())
13168 auto *N0C = dyn_cast<ConstantSDNode>(N0->getOperand(1));
13185 SDValue NS = (C0 < C1) ? N0->getOperand(0) : N1->getOperand(0);
13186 SDValue NL = (C0 > C1) ? N0->getOperand(0) : N1->getOperand(0);
13272 SDValue N0 = N->getOperand(0);
13274 if (SDValue Result = combineSelectAndUse(N, N0, N1, DAG, AllOnes, Subtarget))
13276 if (SDValue Result = combineSelectAndUse(N, N1, N0, DAG, AllOnes, Subtarget))
13306 SDValue N0 = N->getOperand(0);
13307 if (!N0->hasOneUse() || N0->getOpcode() != ISD::MUL)
13310 auto *N0C = dyn_cast<ConstantSDNode>(N0->getOperand(1));
13341 SDValue New0 = DAG.getNode(ISD::ADD, DL, VT, N0->getOperand(0),
13365 SDValue N0 = N->getOperand(0);
13367 if (N0.getOpcode() != ISD::ZERO_EXTEND || N1.getOpcode() != ISD::ZERO_EXTEND)
13369 if (!N0.hasOneUse() || !N1.hasOneUse())
13372 SDValue Src0 = N0.getOperand(0);
13402 SDValue N0 = N->getOperand(0);
13412 if (N0.getOpcode() != ISD::XOR || !isOneConstant(N0.getOperand(1)))
13417 if (!DAG.MaskedValueIsZero(N0.getOperand(0), Mask))
13422 N0.getOperand(0));
13450 SDValue N0 = N->getOperand(0);
13456 auto *N0C = dyn_cast<ConstantSDNode>(N0);
13501 SDValue N0 = N->getOperand(0);
13504 if (N0.getOpcode() != ISD::SHL || N0.getOperand(0) != N1 || !N0.hasOneUse())
13507 auto *ShAmtC = dyn_cast<ConstantSDNode>(N0.getOperand(1));
13524 SDValue N0 = N->getOperand(0);
13527 if (isNullConstant(N0) && N1.getOpcode() == ISD::SETCC && N1.hasOneUse() &&
13532 unsigned ShAmt = N0.getValueSizeInBits() - 1;
13545 return combineSelectAndUse(N, N1, N0, DAG, /*AllOnes*/ false, Subtarget);
13552 SDValue N0 = N->getOperand(0);
13556 if (N0.getOpcode() != ISD::XOR || N1.getOpcode() != ISD::XOR)
13559 if (!N0.hasOneUse() || !N1.hasOneUse())
13562 SDValue N01 = N0.getOperand(1);
13580 SDValue N00 = N0.getOperand(0);
13603 SDValue N0 = N->getOperand(0);
13604 EVT SrcVT = N0.getValueType();
13610 if (N0.getOpcode() != ISD::VSELECT || !N0.hasOneUse())
13613 SDValue Cond = N0.getOperand(0);
13614 SDValue True = N0.getOperand(1);
13615 SDValue False = N0.getOperand(2);
13667 SDValue N0 = N->getOperand(0);
13676 N0.getValueType() == MVT::i32 && N0.getOpcode() == ISD::SRL &&
13677 !isa<ConstantSDNode>(N0.getOperand(1)) && N0.hasOneUse()) {
13678 SDLoc DL(N0);
13679 SDValue Op0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N0.getOperand(0));
13680 SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
13696 SDValue N0 = N->getOperand(0);
13704 N0.getOpcode() == ISD::SRL && !isa<ConstantSDNode>(N0.getOperand(1)) &&
13705 N0.hasOneUse()) {
13707 SDValue Op0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N0.getOperand(0));
13708 SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
13731 static SDValue combineOrOfCZERO(SDNode *N, SDValue N0, SDValue N1,
13735 if (N0.getOpcode() != RISCVISD::CZERO_EQZ ||
13737 !N0.hasOneUse() || !N1.hasOneUse())
13741 SDValue Cond = N0.getOperand(1);
13745 SDValue TrueV = N0.getOperand(0);
13780 SDValue N0 = N->getOperand(0);
13782 if (SDValue V = combineOrOfCZERO(N, N0, N1, DAG))
13784 if (SDValue V = combineOrOfCZERO(N, N1, N0, DAG))
13794 SDValue N0 = N->getOperand(0);
13802 N0.getOpcode() == ISD::SHL && isAllOnesConstant(N0.getOperand(0)) &&
13803 !isa<ConstantSDNode>(N0.getOperand(1)) && N0.hasOneUse()) {
13805 SDValue Op0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N0.getOperand(0));
13806 SDValue Op1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, N0.getOperand(1));
13815 if (N0.getOpcode() == RISCVISD::SLLW &&
13816 isAllOnesConstant(N1) && isOneConstant(N0.getOperand(0)) &&
13820 DAG.getConstant(~1, DL, MVT::i64), N0.getOperand(1));
13824 if (N0.getOpcode() == ISD::SETCC && isOneConstant(N1) && N0.hasOneUse()) {
13825 auto *ConstN00 = dyn_cast<ConstantSDNode>(N0.getOperand(0));
13826 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
13828 EVT VT = N0.getValueType();
13829 SDLoc DL(N0);
13832 return DAG.getSetCC(DL, VT, N0.getOperand(1),
13840 if (N->getValueType(0) == MVT::i32 && N0.getOpcode() == ISD::TRUNCATE &&
13841 isOneConstant(N1) && N0.getOperand(0).getOpcode() == ISD::SETCC) {
13842 SDValue N00 = N0.getOperand(0);
13849 SDValue Setcc = DAG.getSetCC(SDLoc(N00), N0.getOperand(0).getValueType(),
13851 return DAG.getNode(ISD::TRUNCATE, SDLoc(N0), N->getValueType(0), Setcc);
14062 SDValue N0 = N->getOperand(0);
14084 if (IsAddSubWith1(N0)) {
14090 SDValue MulVal = DAG.getNode(ISD::MUL, DL, VT, N0, MulOper);
14091 return DAG.getNode(AddSubOpc, DL, VT, N0, MulVal);
14138 SDValue N0 = N.getOperand(0);
14139 if (N0.getOpcode() != ISD::ZERO_EXTEND &&
14140 N0.getOpcode() != RISCVISD::VZEXT_VL)
14142 if (!N0->hasOneUse())
14150 SDValue Src = N0.getOperand(0);
14158 if (NewElen >= N0.getValueType().getScalarSizeInBits())
14164 SDValue NewExt = DAG.getNode(N0->getOpcode(), DL, NewVT, N0->ops());
14176 SDValue N0 = N->getOperand(0);
14179 EVT OpVT = N0.getValueType();
14190 if (N0.getOpcode() != ISD::AND || !N0.hasOneUse() ||
14191 !isa<ConstantSDNode>(N0.getOperand(1)) ||
14192 N0.getConstantOperandVal(1) != UINT64_C(0xffffffff))
14203 if (DAG.MaskedValueIsZero(N0.getOperand(0), SignMask))
14215 N0.getOperand(0), DAG.getValueType(MVT::i32));
15617 SDValue N0 = N->getOperand(0);
15623 N0.getOpcode() == ISD::SIGN_EXTEND_INREG && N0.hasOneUse() &&
15624 cast<VTSDNode>(N0.getOperand(1))->getVT() == MVT::i32 &&
15625 N0.getOperand(0).getOpcode() == ISD::SHL && N0.getOperand(0).hasOneUse() &&
15626 isa<ConstantSDNode>(N0.getOperand(0).getOperand(1))) {
15627 uint64_t LShAmt = N0.getOperand(0).getConstantOperandVal(1);
15629 SDLoc ShlDL(N0.getOperand(0));
15631 N0.getOperand(0).getOperand(0),
15649 bool IsAdd = N0.getOpcode() == ISD::ADD;
15650 if ((IsAdd || N0.getOpcode() == ISD::SUB)) {
15652 AddC = dyn_cast<ConstantSDNode>(N0.getOperand(IsAdd ? 1 : 0));
15663 for (SDNode *U : N0->uses()) {
15670 Shl = N0.getOperand(IsAdd ? 0 : 1);
15673 Shl = N0;
16502 SDValue N0 = Op.getOperand(0);
16504 if (N0.getOpcode() != ISD::SIGN_EXTEND || !N0.hasOneUse() ||
16508 SDValue N00 = N0.getOperand(0);
16791 SDValue N0 = N->getOperand(0);
16794 if (VT.isVector() && N0.hasOneUse() && N0.getOpcode() == ISD::SIGN_EXTEND) {
16795 SDValue Src = N0.getOperand(0);
17611 SDValue N0 = N->getOperand(0);
17613 EVT SrcVT = N0.getValueType();
17620 Ops[0] = N0;
17622 N0 = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v8i1, Ops);
17623 N0 = DAG.getBitcast(MVT::i8, N0);
17624 return DAG.getNode(ISD::TRUNCATE, DL, VT, N0);
17664 SDValue N0 = N->getOperand(0);
17665 EVT Ty = N0.getValueType();
17667 (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::OR)) {
17668 auto *C1 = dyn_cast<ConstantSDNode>(N0->getOperand(1));