Lines Matching defs:SVN
4893 static SDValue lowerBitreverseShuffle(ShuffleVectorSDNode *SVN,
4896 SDLoc DL(SVN);
4897 MVT VT = SVN->getSimpleValueType(0);
4898 SDValue V = SVN->getOperand(0);
4903 if (!ShuffleVectorInst::isReverseMask(SVN->getMask(),
4904 SVN->getMask().size()) ||
4905 !SVN->getOperand(1).isUndef())
4945 static bool isLegalBitRotate(ShuffleVectorSDNode *SVN,
4949 SDLoc DL(SVN);
4951 EVT VT = SVN->getValueType(0);
4955 if (!ShuffleVectorInst::isBitRotateMask(SVN->getMask(), EltSizeInBits, 2,
4968 static SDValue lowerVECTOR_SHUFFLEAsRotate(ShuffleVectorSDNode *SVN,
4971 SDLoc DL(SVN);
4973 EVT VT = SVN->getValueType(0);
4976 if (!isLegalBitRotate(SVN, DAG, Subtarget, RotateVT, RotateAmt))
4979 SDValue Op = DAG.getBitcast(RotateVT, SVN->getOperand(0));
4996 static SDValue lowerShuffleViaVRegSplitting(ShuffleVectorSDNode *SVN,
4999 SDLoc DL(SVN);
5000 MVT VT = SVN->getSimpleValueType(0);
5001 SDValue V1 = SVN->getOperand(0);
5002 SDValue V2 = SVN->getOperand(1);
5003 ArrayRef<int> Mask = SVN->getMask();
5016 if (isLegalBitRotate(SVN, DAG, Subtarget, RotateVT, RotateAmt))
5086 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode());
5091 if (SDValue V = lowerVECTOR_SHUFFLEAsRotate(SVN, DAG, Subtarget))
5093 if (SDValue V = lowerBitreverseShuffle(SVN, DAG, Subtarget))
5101 SDValue Shuffled = DAG.getVectorShuffle(WidenVT, DL, V1, V2, SVN->getMask());
5110 if (SVN->isSplat()) {
5111 const int Lane = SVN->getSplatIndex();
5196 if (SDValue V = lowerShuffleViaVRegSplitting(SVN, DAG, Subtarget))
5199 ArrayRef<int> Mask = SVN->getMask();
5212 if (SDValue V = lowerVECTOR_SHUFFLEAsRotate(SVN, DAG, Subtarget))
5289 if (SDValue V = lowerVECTOR_SHUFFLEAsRotate(SVN, DAG, Subtarget))