Lines Matching refs:MBBI
45 bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
47 bool expandCCOp(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
49 bool expandVSetVL(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
51 MachineBasicBlock::iterator MBBI, unsigned Opcode);
53 MachineBasicBlock::iterator MBBI);
55 MachineBasicBlock::iterator MBBI);
91 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); in expandMBB() local
92 while (MBBI != E) { in expandMBB()
93 MachineBasicBlock::iterator NMBBI = std::next(MBBI); in expandMBB()
94 Modified |= expandMI(MBB, MBBI, NMBBI); in expandMBB()
95 MBBI = NMBBI; in expandMBB()
102 MachineBasicBlock::iterator MBBI, in expandMI() argument
107 switch (MBBI->getOpcode()) { in expandMI()
109 return expandRV32ZdinxStore(MBB, MBBI); in expandMI()
111 return expandRV32ZdinxLoad(MBB, MBBI); in expandMI()
141 return expandCCOp(MBB, MBBI, NextMBBI); in expandMI()
145 return expandVSetVL(MBB, MBBI); in expandMI()
154 return expandVMSET_VMCLR(MBB, MBBI, RISCV::VMXOR_MM); in expandMI()
163 return expandVMSET_VMCLR(MBB, MBBI, RISCV::VMXNOR_MM); in expandMI()
170 MachineBasicBlock::iterator MBBI, in expandCCOp() argument
174 MachineInstr &MI = *MBBI; in expandCCOp()
190 BuildMI(MBB, MBBI, DL, TII->getBrCond(CC)) in expandCCOp()
262 MachineBasicBlock::iterator MBBI) { in expandVSetVL() argument
263 assert(MBBI->getNumExplicitOperands() == 3 && MBBI->getNumOperands() >= 5 && in expandVSetVL()
266 DebugLoc DL = MBBI->getDebugLoc(); in expandVSetVL()
268 assert((MBBI->getOpcode() == RISCV::PseudoVSETVLI || in expandVSetVL()
269 MBBI->getOpcode() == RISCV::PseudoVSETVLIX0 || in expandVSetVL()
270 MBBI->getOpcode() == RISCV::PseudoVSETIVLI) && in expandVSetVL()
273 if (MBBI->getOpcode() == RISCV::PseudoVSETIVLI) in expandVSetVL()
280 Register DstReg = MBBI->getOperand(0).getReg(); in expandVSetVL()
281 bool DstIsDead = MBBI->getOperand(0).isDead(); in expandVSetVL()
282 BuildMI(MBB, MBBI, DL, Desc) in expandVSetVL()
284 .add(MBBI->getOperand(1)) // VL in expandVSetVL()
285 .add(MBBI->getOperand(2)); // VType in expandVSetVL()
287 MBBI->eraseFromParent(); // The pseudo instruction is gone now. in expandVSetVL()
292 MachineBasicBlock::iterator MBBI, in expandVMSET_VMCLR() argument
294 DebugLoc DL = MBBI->getDebugLoc(); in expandVMSET_VMCLR()
295 Register DstReg = MBBI->getOperand(0).getReg(); in expandVMSET_VMCLR()
297 BuildMI(MBB, MBBI, DL, Desc, DstReg) in expandVMSET_VMCLR()
300 MBBI->eraseFromParent(); // The pseudo instruction is gone now. in expandVMSET_VMCLR()
308 MachineBasicBlock::iterator MBBI) { in expandRV32ZdinxStore() argument
309 DebugLoc DL = MBBI->getDebugLoc(); in expandRV32ZdinxStore()
312 TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_even); in expandRV32ZdinxStore()
314 TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_odd); in expandRV32ZdinxStore()
316 assert(MBBI->hasOneMemOperand() && "Expected mem operand"); in expandRV32ZdinxStore()
317 MachineMemOperand *OldMMO = MBBI->memoperands().front(); in expandRV32ZdinxStore()
322 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW)) in expandRV32ZdinxStore()
323 .addReg(Lo, getKillRegState(MBBI->getOperand(0).isKill())) in expandRV32ZdinxStore()
324 .addReg(MBBI->getOperand(1).getReg()) in expandRV32ZdinxStore()
325 .add(MBBI->getOperand(2)) in expandRV32ZdinxStore()
328 if (MBBI->getOperand(2).isGlobal() || MBBI->getOperand(2).isCPI()) { in expandRV32ZdinxStore()
332 assert(MBBI->getOperand(2).getOffset() % 8 == 0); in expandRV32ZdinxStore()
333 MBBI->getOperand(2).setOffset(MBBI->getOperand(2).getOffset() + 4); in expandRV32ZdinxStore()
334 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW)) in expandRV32ZdinxStore()
335 .addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill())) in expandRV32ZdinxStore()
336 .add(MBBI->getOperand(1)) in expandRV32ZdinxStore()
337 .add(MBBI->getOperand(2)) in expandRV32ZdinxStore()
340 assert(isInt<12>(MBBI->getOperand(2).getImm() + 4)); in expandRV32ZdinxStore()
341 BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW)) in expandRV32ZdinxStore()
342 .addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill())) in expandRV32ZdinxStore()
343 .add(MBBI->getOperand(1)) in expandRV32ZdinxStore()
344 .addImm(MBBI->getOperand(2).getImm() + 4) in expandRV32ZdinxStore()
347 MBBI->eraseFromParent(); in expandRV32ZdinxStore()
355 MachineBasicBlock::iterator MBBI) { in expandRV32ZdinxLoad() argument
356 DebugLoc DL = MBBI->getDebugLoc(); in expandRV32ZdinxLoad()
359 TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_even); in expandRV32ZdinxLoad()
361 TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_odd); in expandRV32ZdinxLoad()
363 assert(MBBI->hasOneMemOperand() && "Expected mem operand"); in expandRV32ZdinxLoad()
364 MachineMemOperand *OldMMO = MBBI->memoperands().front(); in expandRV32ZdinxLoad()
371 bool IsOp1EqualToLo = Lo == MBBI->getOperand(1).getReg(); in expandRV32ZdinxLoad()
374 BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo) in expandRV32ZdinxLoad()
375 .addReg(MBBI->getOperand(1).getReg()) in expandRV32ZdinxLoad()
376 .add(MBBI->getOperand(2)) in expandRV32ZdinxLoad()
380 if (MBBI->getOperand(2).isGlobal() || MBBI->getOperand(2).isCPI()) { in expandRV32ZdinxLoad()
381 auto Offset = MBBI->getOperand(2).getOffset(); in expandRV32ZdinxLoad()
382 assert(MBBI->getOperand(2).getOffset() % 8 == 0); in expandRV32ZdinxLoad()
383 MBBI->getOperand(2).setOffset(Offset + 4); in expandRV32ZdinxLoad()
384 BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi) in expandRV32ZdinxLoad()
385 .addReg(MBBI->getOperand(1).getReg()) in expandRV32ZdinxLoad()
386 .add(MBBI->getOperand(2)) in expandRV32ZdinxLoad()
388 MBBI->getOperand(2).setOffset(Offset); in expandRV32ZdinxLoad()
390 assert(isInt<12>(MBBI->getOperand(2).getImm() + 4)); in expandRV32ZdinxLoad()
391 BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi) in expandRV32ZdinxLoad()
392 .addReg(MBBI->getOperand(1).getReg()) in expandRV32ZdinxLoad()
393 .addImm(MBBI->getOperand(2).getImm() + 4) in expandRV32ZdinxLoad()
399 BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo) in expandRV32ZdinxLoad()
400 .addReg(MBBI->getOperand(1).getReg()) in expandRV32ZdinxLoad()
401 .add(MBBI->getOperand(2)) in expandRV32ZdinxLoad()
405 MBBI->eraseFromParent(); in expandRV32ZdinxLoad()
429 bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
432 MachineBasicBlock::iterator MBBI,
436 MachineBasicBlock::iterator MBBI,
439 MachineBasicBlock::iterator MBBI,
442 MachineBasicBlock::iterator MBBI,
445 MachineBasicBlock::iterator MBBI,
448 MachineBasicBlock::iterator MBBI,
486 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); in expandMBB() local
487 while (MBBI != E) { in expandMBB()
488 MachineBasicBlock::iterator NMBBI = std::next(MBBI); in expandMBB()
489 Modified |= expandMI(MBB, MBBI, NMBBI); in expandMBB()
490 MBBI = NMBBI; in expandMBB()
497 MachineBasicBlock::iterator MBBI, in expandMI() argument
500 switch (MBBI->getOpcode()) { in expandMI()
502 return expandLoadLocalAddress(MBB, MBBI, NextMBBI); in expandMI()
504 return expandLoadGlobalAddress(MBB, MBBI, NextMBBI); in expandMI()
506 return expandLoadTLSIEAddress(MBB, MBBI, NextMBBI); in expandMI()
508 return expandLoadTLSGDAddress(MBB, MBBI, NextMBBI); in expandMI()
510 return expandLoadTLSDescAddress(MBB, MBBI, NextMBBI); in expandMI()
516 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in expandAuipcInstPair() argument
520 MachineInstr &MI = *MBBI; in expandAuipcInstPair()
532 BuildMI(MBB, MBBI, DL, TII->get(RISCV::AUIPC), ScratchReg).add(Symbol); in expandAuipcInstPair()
536 BuildMI(MBB, MBBI, DL, TII->get(SecondOpcode), DestReg) in expandAuipcInstPair()
548 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in expandLoadLocalAddress() argument
550 return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_PCREL_HI, in expandLoadLocalAddress()
555 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in expandLoadGlobalAddress() argument
558 return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_GOT_HI, in expandLoadGlobalAddress()
563 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in expandLoadTLSIEAddress() argument
566 return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_TLS_GOT_HI, in expandLoadTLSIEAddress()
571 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in expandLoadTLSGDAddress() argument
573 return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_TLS_GD_HI, in expandLoadTLSGDAddress()
578 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in expandLoadTLSDescAddress() argument
581 MachineInstr &MI = *MBBI; in expandLoadTLSDescAddress()
598 BuildMI(MBB, MBBI, DL, TII->get(RISCV::AUIPC), ScratchReg).add(Symbol); in expandLoadTLSDescAddress()
601 BuildMI(MBB, MBBI, DL, TII->get(SecondOpcode), DestReg) in expandLoadTLSDescAddress()
605 BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADDI), RISCV::X10) in expandLoadTLSDescAddress()
609 BuildMI(MBB, MBBI, DL, TII->get(RISCV::PseudoTLSDESCCall), RISCV::X5) in expandLoadTLSDescAddress()
614 BuildMI(MBB, MBBI, DL, TII->get(RISCV::ADD), FinalReg) in expandLoadTLSDescAddress()