Lines Matching refs:RISCV
105 if (Inst.getOpcode() == RISCV::VSETVLI || in createInstruments()
106 Inst.getOpcode() == RISCV::VSETIVLI) { in createInstruments()
172 case RISCV::VLM_V: in getEEWAndEMUL()
173 case RISCV::VSM_V: in getEEWAndEMUL()
174 case RISCV::VLE8_V: in getEEWAndEMUL()
175 case RISCV::VSE8_V: in getEEWAndEMUL()
176 case RISCV::VLSE8_V: in getEEWAndEMUL()
177 case RISCV::VSSE8_V: in getEEWAndEMUL()
180 case RISCV::VLE16_V: in getEEWAndEMUL()
181 case RISCV::VSE16_V: in getEEWAndEMUL()
182 case RISCV::VLSE16_V: in getEEWAndEMUL()
183 case RISCV::VSSE16_V: in getEEWAndEMUL()
186 case RISCV::VLE32_V: in getEEWAndEMUL()
187 case RISCV::VSE32_V: in getEEWAndEMUL()
188 case RISCV::VLSE32_V: in getEEWAndEMUL()
189 case RISCV::VSSE32_V: in getEEWAndEMUL()
192 case RISCV::VLE64_V: in getEEWAndEMUL()
193 case RISCV::VSE64_V: in getEEWAndEMUL()
194 case RISCV::VLSE64_V: in getEEWAndEMUL()
195 case RISCV::VSSE64_V: in getEEWAndEMUL()
209 return Opcode == RISCV::VLM_V || Opcode == RISCV::VSM_V || in opcodeHasEEWAndEMULInfo()
210 Opcode == RISCV::VLE8_V || Opcode == RISCV::VSE8_V || in opcodeHasEEWAndEMULInfo()
211 Opcode == RISCV::VLE16_V || Opcode == RISCV::VSE16_V || in opcodeHasEEWAndEMULInfo()
212 Opcode == RISCV::VLE32_V || Opcode == RISCV::VSE32_V || in opcodeHasEEWAndEMULInfo()
213 Opcode == RISCV::VLE64_V || Opcode == RISCV::VSE64_V || in opcodeHasEEWAndEMULInfo()
214 Opcode == RISCV::VLSE8_V || Opcode == RISCV::VSSE8_V || in opcodeHasEEWAndEMULInfo()
215 Opcode == RISCV::VLSE16_V || Opcode == RISCV::VSSE16_V || in opcodeHasEEWAndEMULInfo()
216 Opcode == RISCV::VLSE32_V || Opcode == RISCV::VSSE32_V || in opcodeHasEEWAndEMULInfo()
217 Opcode == RISCV::VLSE64_V || Opcode == RISCV::VSSE64_V; in opcodeHasEEWAndEMULInfo()