40             (ST.hasStdExtD() && Query.Types[TypeIdx].getSizeInBits() == 64));  in typeIsScalarFPArith()
50            (Query.Types[TypeIdx].getScalarSizeInBits() != 64 ||  in typeIsLegalIntOrFPVec()
53             ST.getELen() == 64);  in typeIsLegalIntOrFPVec()
65             ST.getELen() == 64);  in typeIsLegalBoolVec()
78   const LLT s64 = LLT::scalar(64);  in RISCVLegalizerInfo()
86   const LLT nxv64s1 = LLT::scalable_vector(64, s1);  in RISCVLegalizerInfo()
94   const LLT nxv64s8 = LLT::scalable_vector(64, s8);  in RISCVLegalizerInfo()
257   if (XLen == 64 || ST.hasStdExtD())  in RISCVLegalizerInfo()
260       .clampScalar(0, s32, (XLen == 64 || ST.hasStdExtD()) ? s64 : s32)  in RISCVLegalizerInfo()
272   if (XLen == 64) {  in RISCVLegalizerInfo()
276                                                {s64, p0, s64, 64}});  in RISCVLegalizerInfo()
280     LoadStoreActions.legalForTypesWithMemDesc({{s64, p0, s64, 64}});  in RISCVLegalizerInfo()
518   // If the shift amount is a G_CONSTANT, promote it to a 64 bit type so the  in legalizeShlAshrLshr()
528   auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount);  in legalizeShlAshrLshr()
553   assert(APImm.getBitWidth() == 32 || APImm.getBitWidth() == 64);  in shouldBeInConstantPool()
587                                         MachineIRBuilder &MIB) const {  in legalizeVScale()
591   // We define our scalable vector types for lmul=1 to use a 64 bit known  in legalizeVScale()
594   static_assert(RISCV::RVVBitsPerBlock == 64, "Unexpected bits per block!");  in legalizeVScale()
605       auto VLENB = MIB.buildInstr(RISCV::G_READ_VLENB, {XLenTy}, {});  in legalizeVScale()
606       MIB.buildLShr(Dst, VLENB, MIB.buildConstant(XLenTy, 3 - Log2));  in legalizeVScale()
608       auto VLENB = MIB.buildInstr(RISCV::G_READ_VLENB, {XLenTy}, {});  in legalizeVScale()
609       MIB.buildShl(Dst, VLENB, MIB.buildConstant(XLenTy, Log2 - 3));  in legalizeVScale()
611       MIB.buildInstr(RISCV::G_READ_VLENB, {Dst}, {});  in legalizeVScale()
616     auto VLENB = MIB.buildInstr(RISCV::G_READ_VLENB, {XLenTy}, {});  in legalizeVScale()
617     MIB.buildMul(Dst, VLENB, MIB.buildConstant(XLenTy, Val / 8));  in legalizeVScale()
619     auto VLENB = MIB.buildInstr(RISCV::G_READ_VLENB, {XLenTy}, {});  in legalizeVScale()
620     auto VScale = MIB.buildLShr(XLenTy, VLENB, MIB.buildConstant(XLenTy, 3));  in legalizeVScale()
621     MIB.buildMul(Dst, VScale, MIB.buildConstant(XLenTy, Val));  in legalizeVScale()
632                                      MachineIRBuilder &MIB) const {  in legalizeExt()
638   MachineRegisterInfo &MRI = *MIB.getMRI();  in legalizeExt()
645   auto SplatZero = MIB.buildSplatVector(DstTy, MIB.buildConstant(DstEltTy, 0));  in legalizeExt()
647       MIB.buildSplatVector(DstTy, MIB.buildConstant(DstEltTy, ExtTrueVal));  in legalizeExt()
648   MIB.buildSelect(Dst, Src, SplatTrue, SplatZero);  in legalizeExt()
666                                             MachineIRBuilder &MIB,  in buildAllOnesMask()  argument
669   return MIB.buildInstr(RISCV::G_VMSET_VL, {MaskTy}, {VL});  in buildAllOnesMask()
675 buildDefaultVLOps(const DstOp &Dst, MachineIRBuilder &MIB,  in buildDefaultVLOps()  argument
680   MachineInstrBuilder Mask = buildAllOnesMask(VecTy, VL, MIB, MRI);  in buildDefaultVLOps()
686                          Register Hi, Register VL, MachineIRBuilder &MIB,  in buildSplatPartsS64WithVL()  argument
696   return MIB.buildInstr(RISCV::G_SPLAT_VECTOR_SPLIT_I64_VL, {Dst},  in buildSplatPartsS64WithVL()
703                          MachineIRBuilder &MIB, MachineRegisterInfo &MRI) {  in buildSplatSplitS64WithVL()  argument
704   assert(Scalar.getLLTTy(MRI) == LLT::scalar(64) && "Unexpected VecTy!");  in buildSplatSplitS64WithVL()
705   auto Unmerge = MIB.buildUnmerge(LLT::scalar(32), Scalar);  in buildSplatSplitS64WithVL()
707                                   Unmerge.getReg(1), VL, MIB, MRI);  in buildSplatSplitS64WithVL()
715                                              MachineIRBuilder &MIB) const {  in legalizeSplatVector()
718   MachineRegisterInfo &MRI = *MIB.getMRI();  in legalizeSplatVector()
728       VecTy.getElementType().getSizeInBits() == 64) {  in legalizeSplatVector()
729     auto [_, VL] = buildDefaultVLOps(Dst, MIB, MRI);  in legalizeSplatVector()
730     buildSplatSplitS64WithVL(Dst, MIB.buildUndef(VecTy), SplatVal, VL, MIB,  in legalizeSplatVector()
739     auto VL = buildDefaultVLOps(VecTy, MIB, MRI).second;  in legalizeSplatVector()
740     MIB.buildInstr(RISCV::G_VMSET_VL, {Dst}, {VL});  in legalizeSplatVector()
745     auto VL = buildDefaultVLOps(VecTy, MIB, MRI).second;  in legalizeSplatVector()
746     MIB.buildInstr(RISCV::G_VMCLR_VL, {Dst}, {VL});  in legalizeSplatVector()
755   auto ZExtSplatVal = MIB.buildZExt(InterEltTy, SplatVal);  in legalizeSplatVector()
757       MIB.buildAnd(InterEltTy, ZExtSplatVal, MIB.buildConstant(InterEltTy, 1));  in legalizeSplatVector()
758   auto LHS = MIB.buildSplatVector(InterTy, And);  in legalizeSplatVector()
760       MIB.buildSplatVector(InterTy, MIB.buildConstant(InterEltTy, 0));  in legalizeSplatVector()
761   MIB.buildICmp(CmpInst::Predicate::ICMP_NE, Dst, LHS, ZeroSplat);  in legalizeSplatVector()
806     MachineIRBuilder MIB(MI);  in legalizeCustom()  local
811     auto FClassMask = MIB.buildConstant(sXLen, GFpClassImm.rotr(2).zext(XLen));  in legalizeCustom()
812     auto ConstZero = MIB.buildConstant(sXLen, 0);  in legalizeCustom()
814     auto GFClass = MIB.buildInstr(RISCV::G_FCLASS, {sXLen}, {Src});  in legalizeCustom()
815     auto And = MIB.buildAnd(sXLen, GFClass, FClassMask);  in legalizeCustom()
816     MIB.buildICmp(CmpInst::ICMP_NE, GISFPCLASS, And, ConstZero);  in legalizeCustom()