Lines Matching refs:Insn
347 static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn,
351 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn,
355 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, uint32_t Insn,
359 static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, uint32_t Insn,
363 static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst &Inst, uint32_t Insn,
367 static DecodeStatus decodeXTHeadMemPair(MCInst &Inst, uint32_t Insn,
374 static DecodeStatus decodeRegReg(MCInst &Inst, uint32_t Insn, uint64_t Address,
380 static DecodeStatus decodeCSSPushPopchk(MCInst &Inst, uint32_t Insn,
386 static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs1ImmZero() argument
389 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1ImmZero()
398 static DecodeStatus decodeCSSPushPopchk(MCInst &Inst, uint32_t Insn, in decodeCSSPushPopchk() argument
401 uint32_t Rs1 = fieldFromInstruction(Insn, 7, 5); in decodeCSSPushPopchk()
408 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdSImm() argument
413 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdSImm()
420 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs1UImm() argument
426 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs1UImm()
433 static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs2() argument
436 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs2()
437 uint32_t Rs2 = fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs2()
443 static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs1Rs2() argument
446 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1Rs2()
447 uint32_t Rs2 = fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs1Rs2()
454 static DecodeStatus decodeXTHeadMemPair(MCInst &Inst, uint32_t Insn, in decodeXTHeadMemPair() argument
457 uint32_t Rd1 = fieldFromInstruction(Insn, 7, 5); in decodeXTHeadMemPair()
458 uint32_t Rs1 = fieldFromInstruction(Insn, 15, 5); in decodeXTHeadMemPair()
459 uint32_t Rd2 = fieldFromInstruction(Insn, 20, 5); in decodeXTHeadMemPair()
460 uint32_t UImm2 = fieldFromInstruction(Insn, 25, 2); in decodeXTHeadMemPair()
488 static DecodeStatus decodeRegReg(MCInst &Inst, uint32_t Insn, uint64_t Address, in decodeRegReg() argument
490 uint32_t Rs1 = fieldFromInstruction(Insn, 0, 5); in decodeRegReg()
491 uint32_t Rs2 = fieldFromInstruction(Insn, 5, 5); in decodeRegReg()
518 decodeInstruction(DECODER_TABLE, MI, Insn, Address, this, STI); \
544 uint32_t Insn = support::endian::read32le(Bytes.data()); in getInstruction32() local
638 uint32_t Insn = support::endian::read16le(Bytes.data()); in getInstruction16() local