Lines Matching refs:ErrorLoc

105   bool generateImmOutOfRangeError(SMLoc ErrorLoc, int64_t Lower, int64_t Upper,
126 bool generateVTypeError(SMLoc ErrorLoc);
1377 SMLoc ErrorLoc, int64_t Lower, int64_t Upper, in generateImmOutOfRangeError() argument
1379 return Error(ErrorLoc, Msg + " [" + Twine(Lower) + ", " + Twine(Upper) + "]"); in generateImmOutOfRangeError()
1385 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in generateImmOutOfRangeError() local
1386 return generateImmOutOfRangeError(ErrorLoc, Lower, Upper, Msg); in generateImmOutOfRangeError()
1426 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction() local
1429 return Error(ErrorLoc, "too few operands for instruction"); in MatchAndEmitInstruction()
1431 ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction()
1432 if (ErrorLoc == SMLoc()) in MatchAndEmitInstruction()
1433 ErrorLoc = IDLoc; in MatchAndEmitInstruction()
1435 return Error(ErrorLoc, "invalid operand for instruction"); in MatchAndEmitInstruction()
1443 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction() local
1445 return Error(ErrorLoc, "too few operands for instruction"); in MatchAndEmitInstruction()
1457 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1458 return Error(ErrorLoc, "operand must be a constant 64-bit integer"); in MatchAndEmitInstruction()
1465 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1466 return Error(ErrorLoc, "operand either must be a constant 64-bit integer " in MatchAndEmitInstruction()
1475 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1476 return Error(ErrorLoc, "immediate must be zero"); in MatchAndEmitInstruction()
1601 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1602 return Error(ErrorLoc, "operand must be a valid floating-point constant"); in MatchAndEmitInstruction()
1605 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1606 return Error(ErrorLoc, "operand must be a bare symbol name"); in MatchAndEmitInstruction()
1609 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1610 return Error(ErrorLoc, "operand must be a valid jump target"); in MatchAndEmitInstruction()
1613 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1614 return Error(ErrorLoc, "operand must be a bare symbol name"); in MatchAndEmitInstruction()
1617 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1618 return Error(ErrorLoc, "operand must be a symbol with %tprel_add modifier"); in MatchAndEmitInstruction()
1621 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1622 return Error(ErrorLoc, in MatchAndEmitInstruction()
1626 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1627 return Error(ErrorLoc, "operand must be 'rtz' floating-point rounding mode"); in MatchAndEmitInstruction()
1630 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1631 return generateVTypeError(ErrorLoc); in MatchAndEmitInstruction()
1634 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1635 return Error(ErrorLoc, "operand must be v0.t"); in MatchAndEmitInstruction()
1643 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1645 ErrorLoc, in MatchAndEmitInstruction()
1649 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1651 ErrorLoc, in MatchAndEmitInstruction()
1659 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction() local
1660 return Error(ErrorLoc, "operands must be register and register"); in MatchAndEmitInstruction()
2282 bool RISCVAsmParser::generateVTypeError(SMLoc ErrorLoc) { in generateVTypeError() argument
2284 ErrorLoc, in generateVTypeError()
3105 SMLoc ErrorLoc = Parser.getTok().getLoc(); in parseDirectiveInsn() local
3122 return Error(ErrorLoc, "invalid operand for instruction"); in parseDirectiveInsn()
3124 return Error(ErrorLoc, "compressed instructions are not allowed"); in parseDirectiveInsn()
3126 return Error(ErrorLoc, "instruction length mismatch"); in parseDirectiveInsn()
3140 return Error(ErrorLoc, "invalid instruction format"); in parseDirectiveInsn()
3430 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[3]).getStartLoc(); in checkPseudoAddTPRel() local
3431 return Error(ErrorLoc, "the second input operand must be tp/x4 when using " in checkPseudoAddTPRel()
3443 SMLoc ErrorLoc = ((RISCVOperand &)*Operands[3]).getStartLoc(); in checkPseudoTLSDESCCall() local
3444 return Error(ErrorLoc, "the output operand must be t0/x5 when using " in checkPseudoTLSDESCCall()