Lines Matching full:acc
9 // Register info for registers related to MMA. These are the ACC and UACC
19 // ACC - One of the 8 512-bit VSX accumulators.
20 class ACC<bits<3> num, string n, list<Register> subregs> : PPCReg<n> {
39 def ACC0 : ACC<0, "acc0", [VSRp0, VSRp1]>, DwarfRegNum<[-1, -1]>;
40 def ACC1 : ACC<1, "acc1", [VSRp2, VSRp3]>, DwarfRegNum<[-1, -1]>;
41 def ACC2 : ACC<2, "acc2", [VSRp4, VSRp5]>, DwarfRegNum<[-1, -1]>;
42 def ACC3 : ACC<3, "acc3", [VSRp6, VSRp7]>, DwarfRegNum<[-1, -1]>;
43 def ACC4 : ACC<4, "acc4", [VSRp8, VSRp9]>, DwarfRegNum<[-1, -1]>;
44 def ACC5 : ACC<5, "acc5", [VSRp10, VSRp11]>, DwarfRegNum<[-1, -1]>;
45 def ACC6 : ACC<6, "acc6", [VSRp12, VSRp13]>, DwarfRegNum<[-1, -1]>;
46 def ACC7 : ACC<7, "acc7", [VSRp14, VSRp15]>, DwarfRegNum<[-1, -1]>;
50 // The AllocationPriority is in the range [0, 31]. Assigned the ACC registers
52 // to assign these registers first. This is done because the ACC registers
79 // ACC registers.