Lines Matching +full:0 +full:x01ffffff
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
138 // LI target-flags(ppc-lo) %const.0). in removeRedundantLIs()
141 assert(BBI->getOperand(0).isReg() && in removeRedundantLIs()
146 Register Reg = BBI->getOperand(0).getReg(); in removeRedundantLIs()
149 if (BBI->getOperand(0).isDead()) { in removeRedundantLIs()
150 DeadOrKillToUnset = &BBI->getOperand(0); in removeRedundantLIs()
186 assert(AfterBBI->getOperand(0).isReg() && in removeRedundantLIs()
232 const MachineOperand &LoadedAddressReg = Instr.getOperand(0); in isGOTPLDpc()
274 BBI->getOperand(0).getReg(), in addLinkerOpt()
287 for (unsigned Idx = 0; Idx < CandPairs.size(); Idx++) { in addLinkerOpt()
304 Pair.UseReg = BBI->getOperand(0).getReg(); in addLinkerOpt()
380 Register Acc = BBI.getOperand(0).getReg(); in removeAccPrimeUnprime()
388 Register Acc = BBI.getOperand(0).getReg(); in removeAccPrimeUnprime()
418 if (DSCRValue.getNumOccurrences() > 0 && MF.getName() == "main" && in runOnMachineFunction()
420 DSCRValue = (uint32_t)(DSCRValue & 0x01FFFFFF); // 25-bit DSCR mask in runOnMachineFunction()
440 .addImm(DSCRValue & 0xFFFF); in runOnMachineFunction()
479 MI.getOperand(0).getReg() == MI.getOperand(1).getReg() && in runOnMachineFunction()
480 MI.getOperand(0).getReg() == MI.getOperand(2).getReg()) { in runOnMachineFunction()
488 MI.getOperand(0).getReg() == MI.getOperand(1).getReg()) { in runOnMachineFunction()
533 Register CRBit = Br->getOperand(0).getReg(); in runOnMachineFunction()
541 It->getOperand(0).getReg() == CRBit) in runOnMachineFunction()
604 char PPCPreEmitPeephole::ID = 0;