Lines Matching refs:SrcMI
941 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local
942 unsigned SrcOpcode = SrcMI->getOpcode(); in simplifyCode()
946 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg())) in simplifyCode()
972 LLVM_DEBUG(SrcMI->dump()); in simplifyCode()
976 SrcMI->setDesc(TII->get(Opc)); in simplifyCode()
977 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
992 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local
993 unsigned SrcOpcode = SrcMI->getOpcode(); in simplifyCode()
997 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg())) in simplifyCode()
1005 if (SrcMI->getOperand(1).isGlobal()) { in simplifyCode()
1007 dyn_cast<GlobalObject>(SrcMI->getOperand(1).getGlobal()); in simplifyCode()
1009 (SrcMI->getOperand(1).getOffset() % 4 == 0)) in simplifyCode()
1011 } else if (SrcMI->getOperand(1).isImm()) { in simplifyCode()
1012 int64_t Value = SrcMI->getOperand(1).getImm(); in simplifyCode()
1044 LLVM_DEBUG(SrcMI->dump()); in simplifyCode()
1048 SrcMI->setDesc(TII->get(Opc)); in simplifyCode()
1049 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
1089 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in simplifyCode() local
1090 if (!(SrcMI && SrcMI->getOpcode() == PPC::INSERT_SUBREG && in simplifyCode()
1091 SrcMI->getOperand(0).isReg() && SrcMI->getOperand(1).isReg())) in simplifyCode()
1095 ImpDefMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in simplifyCode()
1096 SubRegMI = MRI->getVRegDef(SrcMI->getOperand(2).getReg()); in simplifyCode()
1099 SrcMI = SubRegMI; in simplifyCode()
1103 SrcMI = MRI->getVRegDef(CopyReg); in simplifyCode()
1105 if (!SrcMI->getOperand(0).isReg()) in simplifyCode()
1109 getKnownLeadingZeroCount(SrcMI->getOperand(0).getReg(), TII, MRI); in simplifyCode()
1227 MachineInstr *SrcMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
1228 if (!SrcMI) in simplifyCode()
1231 unsigned SrcOpCode = SrcMI->getOpcode(); in simplifyCode()
1236 SrcReg = SrcMI->getOperand(1).getReg(); in simplifyCode()
1249 uint64_t ImmSrc = SrcMI->getOperand(3).getImm(); in simplifyCode()
1260 SrcMI->getOperand(2).getImm() == 0 && in simplifyCode()
1268 LLVM_DEBUG(SrcMI->dump()); in simplifyCode()
1272 MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg()); in simplifyCode()
1276 addRegToUpdate(SrcMI->getOperand(0).getReg()); in simplifyCode()
1905 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in emitRLDICWhenLoweringJumpTables() local
1906 if (SrcMI->getOpcode() != PPC::RLDICL) in emitRLDICWhenLoweringJumpTables()
1909 MachineOperand MOpSHSrc = SrcMI->getOperand(2); in emitRLDICWhenLoweringJumpTables()
1910 MachineOperand MOpMBSrc = SrcMI->getOperand(3); in emitRLDICWhenLoweringJumpTables()
1936 LLVM_DEBUG(SrcMI->dump()); in emitRLDICWhenLoweringJumpTables()
1940 MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg()); in emitRLDICWhenLoweringJumpTables()
1944 addRegToUpdate(SrcMI->getOperand(0).getReg()); in emitRLDICWhenLoweringJumpTables()
1951 assert(!SrcMI->hasImplicitDef() && in emitRLDICWhenLoweringJumpTables()
1953 ToErase = SrcMI; in emitRLDICWhenLoweringJumpTables()
1993 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in combineSEXTAndSHL() local
1994 if (SrcMI->getOpcode() != PPC::EXTSW && in combineSEXTAndSHL()
1995 SrcMI->getOpcode() != PPC::EXTSW_32_64) in combineSEXTAndSHL()
2003 assert(SrcMI->getNumOperands() == 2 && "EXTSW should have 2 operands"); in combineSEXTAndSHL()
2004 assert(SrcMI->getOperand(1).isReg() && in combineSEXTAndSHL()
2006 if (!SrcMI->getOperand(1).getReg().isVirtual()) in combineSEXTAndSHL()
2010 LLVM_DEBUG(SrcMI->dump()); in combineSEXTAndSHL()
2015 SrcMI->getOpcode() == PPC::EXTSW ? TII->get(PPC::EXTSWSLI) in combineSEXTAndSHL()
2018 .add(SrcMI->getOperand(1)) in combineSEXTAndSHL()
2030 addRegToUpdate(SrcMI->getOperand(0).getReg()); in combineSEXTAndSHL()