Lines Matching refs:DefMI
651 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local
653 if (!DefMI) in simplifyCode()
656 unsigned DefOpc = DefMI->getOpcode(); in simplifyCode()
666 TRI->lookThruCopyLike(DefMI->getOperand(1).getReg(), MRI); in simplifyCode()
690 Register DefReg1 = DefMI->getOperand(1).getReg(); in simplifyCode()
691 Register DefReg2 = DefMI->getOperand(2).getReg(); in simplifyCode()
692 unsigned DefImmed = DefMI->getOperand(3).getImm(); in simplifyCode()
741 .add(DefMI->getOperand(1)); in simplifyCode()
742 addRegToUpdate(DefMI->getOperand(0).getReg()); in simplifyCode()
743 addRegToUpdate(DefMI->getOperand(1).getReg()); in simplifyCode()
749 (DefMI->getOperand(2).getImm() == 0 || in simplifyCode()
750 DefMI->getOperand(2).getImm() == 3)) { in simplifyCode()
765 DefMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
784 TII->isLoadFromConstantPool(DefMI)) { in simplifyCode()
785 const Constant *C = TII->getConstantFromConstantPool(DefMI); in simplifyCode()
810 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
811 if (!DefMI) in simplifyCode()
813 unsigned DefOpcode = DefMI->getOpcode(); in simplifyCode()
817 Register ConvReg = DefMI->getOperand(1).getReg(); in simplifyCode()
846 Register ShiftRes = DefMI->getOperand(0).getReg(); in simplifyCode()
847 Register ShiftOp1 = DefMI->getOperand(1).getReg(); in simplifyCode()
848 Register ShiftOp2 = DefMI->getOperand(2).getReg(); in simplifyCode()
849 unsigned ShiftImm = DefMI->getOperand(3).getImm(); in simplifyCode()
856 LLVM_DEBUG(DefMI->dump()); in simplifyCode()
857 ToErase = DefMI; in simplifyCode()
877 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
881 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
883 TRI->lookThruCopyLike(DefMI->getOperand(1).getReg(), MRI); in simplifyCode()
885 TRI->lookThruCopyLike(DefMI->getOperand(2).getReg(), MRI); in simplifyCode()
914 LLVM_DEBUG(DefMI->dump()); in simplifyCode()