1 //===-- PPCInstrInfo.h - PowerPC Instruction Information --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
28 // form if the correct input is a result of a load immediate. In order to
34   // Does the immediate need to be a multiple of some value?
44   // The operand number to check for add-immediate def.
58 // Information required to convert an instruction to just a materialized
194   // If the inst is imm-form and its register operand is produced by a ADDI, put
198   // If the inst is x-form and has imm-form and one of its operand is produced
199   // by a LI, put the imm into the inst directly and remove the LI if possible.
203   // If the inst is x-form and has imm-form and one of its operand is produced
204   // by an add-immediate, try to transform it when possible.
218   // forwarded from an add-immediate that feeds it?
253   /// Do not call this method for a non-commutable instruction or for
254   /// non-commutable pair of operand indices OpIdx1 and OpIdx2.
259   /// rotate amt is zero.  We also have to munge the immediates a bit.
270   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
271   /// such, whenever a client has an instance of instruction info, it should
293                               PPC::EVOR,      -1U};  in isSameClassPhysRegCopy()
294     for (int i = 0; CopyOpcodes[i] != -1U; i++)  in isSameClassPhysRegCopy()
300   static bool hasPCRelFlag(unsigned TF) {  in hasPCRelFlag()  argument
301     return TF == PPCII::MO_PCREL_FLAG || TF == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||  in hasPCRelFlag()
302            TF == PPCII::MO_GOT_TLSLD_PCREL_FLAG ||  in hasPCRelFlag()
303            TF == PPCII::MO_GOT_TPREL_PCREL_FLAG ||  in hasPCRelFlag()
304            TF == PPCII::MO_TPREL_PCREL_FLAG || TF == PPCII::MO_TLS_PCREL_FLAG ||  in hasPCRelFlag()
305            TF == PPCII::MO_GOT_PCREL_FLAG;  in hasPCRelFlag()
308   static bool hasGOTFlag(unsigned TF) {  in hasGOTFlag()  argument
309     return TF == PPCII::MO_GOT_FLAG || TF == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||  in hasGOTFlag()
310            TF == PPCII::MO_GOT_TLSLD_PCREL_FLAG ||  in hasGOTFlag()
311            TF == PPCII::MO_GOT_TPREL_PCREL_FLAG ||  in hasGOTFlag()
312            TF == PPCII::MO_GOT_PCREL_FLAG;  in hasGOTFlag()
315   static bool hasTLSFlag(unsigned TF) {  in hasTLSFlag()  argument
316     return TF == PPCII::MO_TLSGD_FLAG || TF == PPCII::MO_TPREL_FLAG ||  in hasTLSFlag()
317            TF == PPCII::MO_TLSLD_FLAG || TF == PPCII::MO_TLSGDM_FLAG ||  in hasTLSFlag()
318            TF == PPCII::MO_GOT_TLSGD_PCREL_FLAG ||  in hasTLSFlag()
319            TF == PPCII::MO_GOT_TLSLD_PCREL_FLAG ||  in hasTLSFlag()
320            TF == PPCII::MO_GOT_TPREL_PCREL_FLAG || TF == PPCII::MO_TPREL_LO ||  in hasTLSFlag()
321            TF == PPCII::MO_TPREL_HA || TF == PPCII::MO_DTPREL_LO ||  in hasTLSFlag()
322            TF == PPCII::MO_TLSLD_LO || TF == PPCII::MO_TLS ||  in hasTLSFlag()
323            TF == PPCII::MO_TPREL_PCREL_FLAG || TF == PPCII::MO_TLS_PCREL_FLAG;  in hasTLSFlag()
353     // Machine LICM should hoist all instructions in low-register-pressure  in hasLowDefLatency()
354     // situations; none are sufficiently free to justify leaving in a loop  in hasLowDefLatency()
371   /// Return true when there is potentially a faster code sequence for a fma
379   /// Return true when there is potentially a faster code sequence
466   // Emits a register spill without updating the register class for vector
467   // registers. This ensures that when we spill a vector register the
481   // Emits a register reload without updating the register class for vector
482   // registers. This ensures that when we reload a vector register the
588   /// GetInstSize - Return the number of bytes of code the specified
596   decomposeMachineOperandsTargetFlags(unsigned TF) const override;
601   // Expand VSX Memory Pseudo instruction to either a VSX or a FP instruction.
616   // Return true if the register is sign-extended from 32 to 64 bits.
622   // Return true if the register is zero-extended from 32 to 64 bits.
664   /// Find the hardware loop instruction used to set-up the specified loop.
665   /// On PPC, we have two instructions used to set-up the hardware loop
667   /// instructions to indicate the end of a loop.
672   /// Analyze loop L, which must be a single-basic-block loop, and if the
673   /// conditions can be understood enough produce a PipelinerLoopInfo object.