Lines Matching full:ppc
20 // gracefully fallback to PPC C calling convention on Release builds. in CC_PPC_AnyReg_Error()
34 static const MCPhysReg ELF64ArgGPRs[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6, in CC_PPC64_ELF_Shadow_GPR_Regs()
35 PPC::X7, PPC::X8, PPC::X9, PPC::X10}; in CC_PPC64_ELF_Shadow_GPR_Regs()
53 if ((State.AllocateReg(ELF64ArgGPRs) - PPC::X3) % 2 == 1) in CC_PPC64_ELF_Shadow_GPR_Regs()
73 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_AlignArgRegs()
74 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_AlignArgRegs()
98 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
99 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
123 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
124 PPC::F8 in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
133 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
150 static const MCPhysReg HiRegList[] = { PPC::R3, PPC::R5, PPC::R7, PPC::R9 }; in CC_PPC32_SPE_CustomSplitFP64()
151 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 }; in CC_PPC32_SPE_CustomSplitFP64()
179 static const MCPhysReg HiRegList[] = { PPC::R3 }; in CC_PPC32_SPE_RetF64()
180 static const MCPhysReg LoRegList[] = { PPC::R4 }; in CC_PPC32_SPE_RetF64()