Lines Matching refs:cycles

86 // Restricted Dispatch ALU operation for 3 cycles. The operation runs on a
104 // Standard Dispatch ALU operation for 3 cycles. Only one slice used.
121 // Standard Dispatch ALU operation for 2 cycles. Only one slice used.
176 // Restricted Dispatch ALU operation for 2 cycles. The operation runs on a
786 // Requires Load and ALU pieces totaling 6 cycles. The Load and ALU
795 // Requires Load and ALU pieces totaling 6 cycles. The Load and ALU
814 // Requires consecutive Load and ALU pieces totaling 6 cycles. The Load and ALU
826 // Requires consecutive Load and ALU pieces totaling 6 cycles. The Load and ALU
836 // Requires consecutive Load and ALU pieces totaling 7 cycles. The Load and ALU
846 // Requires consecutive Load (4 cycles) and ALU (3 cycles) pieces totaling 7
847 // cycles. The Load and ALU operations cannot be done at the same time and so
859 // Requires consecutive Load and ALU pieces totaling 8 cycles. The Load and ALU
881 // added. Requires 8 cycles. Since the PM requires the full superslice we need
1027 // 2 cycles each.
1039 // 2 cycles each.
1065 // ALU ops are 3 cycles each.
1076 // ALU ops are 3 cycles each.
1110 // total of 6 cycles. All of the ALU operations are also restricted so each
1241 // latencies are added together for 6 cycles. The remainaing ALU is 2 cycles.