Lines Matching full:case
78 case NVPTX::SULD_1D_I8_CLAMP_R:
80 case NVPTX::SULD_1D_I16_CLAMP_R:
82 case NVPTX::SULD_1D_I32_CLAMP_R:
84 case NVPTX::SULD_1D_I64_CLAMP_R:
86 case NVPTX::SULD_1D_ARRAY_I8_CLAMP_R:
88 case NVPTX::SULD_1D_ARRAY_I16_CLAMP_R:
90 case NVPTX::SULD_1D_ARRAY_I32_CLAMP_R:
92 case NVPTX::SULD_1D_ARRAY_I64_CLAMP_R:
94 case NVPTX::SULD_2D_I8_CLAMP_R:
96 case NVPTX::SULD_2D_I16_CLAMP_R:
98 case NVPTX::SULD_2D_I32_CLAMP_R:
100 case NVPTX::SULD_2D_I64_CLAMP_R:
102 case NVPTX::SULD_2D_ARRAY_I8_CLAMP_R:
104 case NVPTX::SULD_2D_ARRAY_I16_CLAMP_R:
106 case NVPTX::SULD_2D_ARRAY_I32_CLAMP_R:
108 case NVPTX::SULD_2D_ARRAY_I64_CLAMP_R:
110 case NVPTX::SULD_3D_I8_CLAMP_R:
112 case NVPTX::SULD_3D_I16_CLAMP_R:
114 case NVPTX::SULD_3D_I32_CLAMP_R:
116 case NVPTX::SULD_3D_I64_CLAMP_R:
118 case NVPTX::SULD_1D_V2I8_CLAMP_R:
120 case NVPTX::SULD_1D_V2I16_CLAMP_R:
122 case NVPTX::SULD_1D_V2I32_CLAMP_R:
124 case NVPTX::SULD_1D_V2I64_CLAMP_R:
126 case NVPTX::SULD_1D_ARRAY_V2I8_CLAMP_R:
128 case NVPTX::SULD_1D_ARRAY_V2I16_CLAMP_R:
130 case NVPTX::SULD_1D_ARRAY_V2I32_CLAMP_R:
132 case NVPTX::SULD_1D_ARRAY_V2I64_CLAMP_R:
134 case NVPTX::SULD_2D_V2I8_CLAMP_R:
136 case NVPTX::SULD_2D_V2I16_CLAMP_R:
138 case NVPTX::SULD_2D_V2I32_CLAMP_R:
140 case NVPTX::SULD_2D_V2I64_CLAMP_R:
142 case NVPTX::SULD_2D_ARRAY_V2I8_CLAMP_R:
144 case NVPTX::SULD_2D_ARRAY_V2I16_CLAMP_R:
146 case NVPTX::SULD_2D_ARRAY_V2I32_CLAMP_R:
148 case NVPTX::SULD_2D_ARRAY_V2I64_CLAMP_R:
150 case NVPTX::SULD_3D_V2I8_CLAMP_R:
152 case NVPTX::SULD_3D_V2I16_CLAMP_R:
154 case NVPTX::SULD_3D_V2I32_CLAMP_R:
156 case NVPTX::SULD_3D_V2I64_CLAMP_R:
158 case NVPTX::SULD_1D_V4I8_CLAMP_R:
160 case NVPTX::SULD_1D_V4I16_CLAMP_R:
162 case NVPTX::SULD_1D_V4I32_CLAMP_R:
164 case NVPTX::SULD_1D_ARRAY_V4I8_CLAMP_R:
166 case NVPTX::SULD_1D_ARRAY_V4I16_CLAMP_R:
168 case NVPTX::SULD_1D_ARRAY_V4I32_CLAMP_R:
170 case NVPTX::SULD_2D_V4I8_CLAMP_R:
172 case NVPTX::SULD_2D_V4I16_CLAMP_R:
174 case NVPTX::SULD_2D_V4I32_CLAMP_R:
176 case NVPTX::SULD_2D_ARRAY_V4I8_CLAMP_R:
178 case NVPTX::SULD_2D_ARRAY_V4I16_CLAMP_R:
180 case NVPTX::SULD_2D_ARRAY_V4I32_CLAMP_R:
182 case NVPTX::SULD_3D_V4I8_CLAMP_R:
184 case NVPTX::SULD_3D_V4I16_CLAMP_R:
186 case NVPTX::SULD_3D_V4I32_CLAMP_R:
188 case NVPTX::SULD_1D_I8_TRAP_R:
190 case NVPTX::SULD_1D_I16_TRAP_R:
192 case NVPTX::SULD_1D_I32_TRAP_R:
194 case NVPTX::SULD_1D_I64_TRAP_R:
196 case NVPTX::SULD_1D_ARRAY_I8_TRAP_R:
198 case NVPTX::SULD_1D_ARRAY_I16_TRAP_R:
200 case NVPTX::SULD_1D_ARRAY_I32_TRAP_R:
202 case NVPTX::SULD_1D_ARRAY_I64_TRAP_R:
204 case NVPTX::SULD_2D_I8_TRAP_R:
206 case NVPTX::SULD_2D_I16_TRAP_R:
208 case NVPTX::SULD_2D_I32_TRAP_R:
210 case NVPTX::SULD_2D_I64_TRAP_R:
212 case NVPTX::SULD_2D_ARRAY_I8_TRAP_R:
214 case NVPTX::SULD_2D_ARRAY_I16_TRAP_R:
216 case NVPTX::SULD_2D_ARRAY_I32_TRAP_R:
218 case NVPTX::SULD_2D_ARRAY_I64_TRAP_R:
220 case NVPTX::SULD_3D_I8_TRAP_R:
222 case NVPTX::SULD_3D_I16_TRAP_R:
224 case NVPTX::SULD_3D_I32_TRAP_R:
226 case NVPTX::SULD_3D_I64_TRAP_R:
228 case NVPTX::SULD_1D_V2I8_TRAP_R:
230 case NVPTX::SULD_1D_V2I16_TRAP_R:
232 case NVPTX::SULD_1D_V2I32_TRAP_R:
234 case NVPTX::SULD_1D_V2I64_TRAP_R:
236 case NVPTX::SULD_1D_ARRAY_V2I8_TRAP_R:
238 case NVPTX::SULD_1D_ARRAY_V2I16_TRAP_R:
240 case NVPTX::SULD_1D_ARRAY_V2I32_TRAP_R:
242 case NVPTX::SULD_1D_ARRAY_V2I64_TRAP_R:
244 case NVPTX::SULD_2D_V2I8_TRAP_R:
246 case NVPTX::SULD_2D_V2I16_TRAP_R:
248 case NVPTX::SULD_2D_V2I32_TRAP_R:
250 case NVPTX::SULD_2D_V2I64_TRAP_R:
252 case NVPTX::SULD_2D_ARRAY_V2I8_TRAP_R:
254 case NVPTX::SULD_2D_ARRAY_V2I16_TRAP_R:
256 case NVPTX::SULD_2D_ARRAY_V2I32_TRAP_R:
258 case NVPTX::SULD_2D_ARRAY_V2I64_TRAP_R:
260 case NVPTX::SULD_3D_V2I8_TRAP_R:
262 case NVPTX::SULD_3D_V2I16_TRAP_R:
264 case NVPTX::SULD_3D_V2I32_TRAP_R:
266 case NVPTX::SULD_3D_V2I64_TRAP_R:
268 case NVPTX::SULD_1D_V4I8_TRAP_R:
270 case NVPTX::SULD_1D_V4I16_TRAP_R:
272 case NVPTX::SULD_1D_V4I32_TRAP_R:
274 case NVPTX::SULD_1D_ARRAY_V4I8_TRAP_R:
276 case NVPTX::SULD_1D_ARRAY_V4I16_TRAP_R:
278 case NVPTX::SULD_1D_ARRAY_V4I32_TRAP_R:
280 case NVPTX::SULD_2D_V4I8_TRAP_R:
282 case NVPTX::SULD_2D_V4I16_TRAP_R:
284 case NVPTX::SULD_2D_V4I32_TRAP_R:
286 case NVPTX::SULD_2D_ARRAY_V4I8_TRAP_R:
288 case NVPTX::SULD_2D_ARRAY_V4I16_TRAP_R:
290 case NVPTX::SULD_2D_ARRAY_V4I32_TRAP_R:
292 case NVPTX::SULD_3D_V4I8_TRAP_R:
294 case NVPTX::SULD_3D_V4I16_TRAP_R:
296 case NVPTX::SULD_3D_V4I32_TRAP_R:
298 case NVPTX::SULD_1D_I8_ZERO_R:
300 case NVPTX::SULD_1D_I16_ZERO_R:
302 case NVPTX::SULD_1D_I32_ZERO_R:
304 case NVPTX::SULD_1D_I64_ZERO_R:
306 case NVPTX::SULD_1D_ARRAY_I8_ZERO_R:
308 case NVPTX::SULD_1D_ARRAY_I16_ZERO_R:
310 case NVPTX::SULD_1D_ARRAY_I32_ZERO_R:
312 case NVPTX::SULD_1D_ARRAY_I64_ZERO_R:
314 case NVPTX::SULD_2D_I8_ZERO_R:
316 case NVPTX::SULD_2D_I16_ZERO_R:
318 case NVPTX::SULD_2D_I32_ZERO_R:
320 case NVPTX::SULD_2D_I64_ZERO_R:
322 case NVPTX::SULD_2D_ARRAY_I8_ZERO_R:
324 case NVPTX::SULD_2D_ARRAY_I16_ZERO_R:
326 case NVPTX::SULD_2D_ARRAY_I32_ZERO_R:
328 case NVPTX::SULD_2D_ARRAY_I64_ZERO_R:
330 case NVPTX::SULD_3D_I8_ZERO_R:
332 case NVPTX::SULD_3D_I16_ZERO_R:
334 case NVPTX::SULD_3D_I32_ZERO_R:
336 case NVPTX::SULD_3D_I64_ZERO_R:
338 case NVPTX::SULD_1D_V2I8_ZERO_R:
340 case NVPTX::SULD_1D_V2I16_ZERO_R:
342 case NVPTX::SULD_1D_V2I32_ZERO_R:
344 case NVPTX::SULD_1D_V2I64_ZERO_R:
346 case NVPTX::SULD_1D_ARRAY_V2I8_ZERO_R:
348 case NVPTX::SULD_1D_ARRAY_V2I16_ZERO_R:
350 case NVPTX::SULD_1D_ARRAY_V2I32_ZERO_R:
352 case NVPTX::SULD_1D_ARRAY_V2I64_ZERO_R:
354 case NVPTX::SULD_2D_V2I8_ZERO_R:
356 case NVPTX::SULD_2D_V2I16_ZERO_R:
358 case NVPTX::SULD_2D_V2I32_ZERO_R:
360 case NVPTX::SULD_2D_V2I64_ZERO_R:
362 case NVPTX::SULD_2D_ARRAY_V2I8_ZERO_R:
364 case NVPTX::SULD_2D_ARRAY_V2I16_ZERO_R:
366 case NVPTX::SULD_2D_ARRAY_V2I32_ZERO_R:
368 case NVPTX::SULD_2D_ARRAY_V2I64_ZERO_R:
370 case NVPTX::SULD_3D_V2I8_ZERO_R:
372 case NVPTX::SULD_3D_V2I16_ZERO_R:
374 case NVPTX::SULD_3D_V2I32_ZERO_R:
376 case NVPTX::SULD_3D_V2I64_ZERO_R:
378 case NVPTX::SULD_1D_V4I8_ZERO_R:
380 case NVPTX::SULD_1D_V4I16_ZERO_R:
382 case NVPTX::SULD_1D_V4I32_ZERO_R:
384 case NVPTX::SULD_1D_ARRAY_V4I8_ZERO_R:
386 case NVPTX::SULD_1D_ARRAY_V4I16_ZERO_R:
388 case NVPTX::SULD_1D_ARRAY_V4I32_ZERO_R:
390 case NVPTX::SULD_2D_V4I8_ZERO_R:
392 case NVPTX::SULD_2D_V4I16_ZERO_R:
394 case NVPTX::SULD_2D_V4I32_ZERO_R:
396 case NVPTX::SULD_2D_ARRAY_V4I8_ZERO_R:
398 case NVPTX::SULD_2D_ARRAY_V4I16_ZERO_R:
400 case NVPTX::SULD_2D_ARRAY_V4I32_ZERO_R:
402 case NVPTX::SULD_3D_V4I8_ZERO_R:
404 case NVPTX::SULD_3D_V4I16_ZERO_R:
406 case NVPTX::SULD_3D_V4I32_ZERO_R:
415 case NVPTX::SUST_B_1D_B8_CLAMP_R:
417 case NVPTX::SUST_B_1D_B16_CLAMP_R:
419 case NVPTX::SUST_B_1D_B32_CLAMP_R:
421 case NVPTX::SUST_B_1D_B64_CLAMP_R:
423 case NVPTX::SUST_B_1D_V2B8_CLAMP_R:
425 case NVPTX::SUST_B_1D_V2B16_CLAMP_R:
427 case NVPTX::SUST_B_1D_V2B32_CLAMP_R:
429 case NVPTX::SUST_B_1D_V2B64_CLAMP_R:
431 case NVPTX::SUST_B_1D_V4B8_CLAMP_R:
433 case NVPTX::SUST_B_1D_V4B16_CLAMP_R:
435 case NVPTX::SUST_B_1D_V4B32_CLAMP_R:
437 case NVPTX::SUST_B_1D_ARRAY_B8_CLAMP_R:
439 case NVPTX::SUST_B_1D_ARRAY_B16_CLAMP_R:
441 case NVPTX::SUST_B_1D_ARRAY_B32_CLAMP_R:
443 case NVPTX::SUST_B_1D_ARRAY_B64_CLAMP_R:
445 case NVPTX::SUST_B_1D_ARRAY_V2B8_CLAMP_R:
447 case NVPTX::SUST_B_1D_ARRAY_V2B16_CLAMP_R:
449 case NVPTX::SUST_B_1D_ARRAY_V2B32_CLAMP_R:
451 case NVPTX::SUST_B_1D_ARRAY_V2B64_CLAMP_R:
453 case NVPTX::SUST_B_1D_ARRAY_V4B8_CLAMP_R:
455 case NVPTX::SUST_B_1D_ARRAY_V4B16_CLAMP_R:
457 case NVPTX::SUST_B_1D_ARRAY_V4B32_CLAMP_R:
459 case NVPTX::SUST_B_2D_B8_CLAMP_R:
461 case NVPTX::SUST_B_2D_B16_CLAMP_R:
463 case NVPTX::SUST_B_2D_B32_CLAMP_R:
465 case NVPTX::SUST_B_2D_B64_CLAMP_R:
467 case NVPTX::SUST_B_2D_V2B8_CLAMP_R:
469 case NVPTX::SUST_B_2D_V2B16_CLAMP_R:
471 case NVPTX::SUST_B_2D_V2B32_CLAMP_R:
473 case NVPTX::SUST_B_2D_V2B64_CLAMP_R:
475 case NVPTX::SUST_B_2D_V4B8_CLAMP_R:
477 case NVPTX::SUST_B_2D_V4B16_CLAMP_R:
479 case NVPTX::SUST_B_2D_V4B32_CLAMP_R:
481 case NVPTX::SUST_B_2D_ARRAY_B8_CLAMP_R:
483 case NVPTX::SUST_B_2D_ARRAY_B16_CLAMP_R:
485 case NVPTX::SUST_B_2D_ARRAY_B32_CLAMP_R:
487 case NVPTX::SUST_B_2D_ARRAY_B64_CLAMP_R:
489 case NVPTX::SUST_B_2D_ARRAY_V2B8_CLAMP_R:
491 case NVPTX::SUST_B_2D_ARRAY_V2B16_CLAMP_R:
493 case NVPTX::SUST_B_2D_ARRAY_V2B32_CLAMP_R:
495 case NVPTX::SUST_B_2D_ARRAY_V2B64_CLAMP_R:
497 case NVPTX::SUST_B_2D_ARRAY_V4B8_CLAMP_R:
499 case NVPTX::SUST_B_2D_ARRAY_V4B16_CLAMP_R:
501 case NVPTX::SUST_B_2D_ARRAY_V4B32_CLAMP_R:
503 case NVPTX::SUST_B_3D_B8_CLAMP_R:
505 case NVPTX::SUST_B_3D_B16_CLAMP_R:
507 case NVPTX::SUST_B_3D_B32_CLAMP_R:
509 case NVPTX::SUST_B_3D_B64_CLAMP_R:
511 case NVPTX::SUST_B_3D_V2B8_CLAMP_R:
513 case NVPTX::SUST_B_3D_V2B16_CLAMP_R:
515 case NVPTX::SUST_B_3D_V2B32_CLAMP_R:
517 case NVPTX::SUST_B_3D_V2B64_CLAMP_R:
519 case NVPTX::SUST_B_3D_V4B8_CLAMP_R:
521 case NVPTX::SUST_B_3D_V4B16_CLAMP_R:
523 case NVPTX::SUST_B_3D_V4B32_CLAMP_R:
525 case NVPTX::SUST_B_1D_B8_TRAP_R:
527 case NVPTX::SUST_B_1D_B16_TRAP_R:
529 case NVPTX::SUST_B_1D_B32_TRAP_R:
531 case NVPTX::SUST_B_1D_B64_TRAP_R:
533 case NVPTX::SUST_B_1D_V2B8_TRAP_R:
535 case NVPTX::SUST_B_1D_V2B16_TRAP_R:
537 case NVPTX::SUST_B_1D_V2B32_TRAP_R:
539 case NVPTX::SUST_B_1D_V2B64_TRAP_R:
541 case NVPTX::SUST_B_1D_V4B8_TRAP_R:
543 case NVPTX::SUST_B_1D_V4B16_TRAP_R:
545 case NVPTX::SUST_B_1D_V4B32_TRAP_R:
547 case NVPTX::SUST_B_1D_ARRAY_B8_TRAP_R:
549 case NVPTX::SUST_B_1D_ARRAY_B16_TRAP_R:
551 case NVPTX::SUST_B_1D_ARRAY_B32_TRAP_R:
553 case NVPTX::SUST_B_1D_ARRAY_B64_TRAP_R:
555 case NVPTX::SUST_B_1D_ARRAY_V2B8_TRAP_R:
557 case NVPTX::SUST_B_1D_ARRAY_V2B16_TRAP_R:
559 case NVPTX::SUST_B_1D_ARRAY_V2B32_TRAP_R:
561 case NVPTX::SUST_B_1D_ARRAY_V2B64_TRAP_R:
563 case NVPTX::SUST_B_1D_ARRAY_V4B8_TRAP_R:
565 case NVPTX::SUST_B_1D_ARRAY_V4B16_TRAP_R:
567 case NVPTX::SUST_B_1D_ARRAY_V4B32_TRAP_R:
569 case NVPTX::SUST_B_2D_B8_TRAP_R:
571 case NVPTX::SUST_B_2D_B16_TRAP_R:
573 case NVPTX::SUST_B_2D_B32_TRAP_R:
575 case NVPTX::SUST_B_2D_B64_TRAP_R:
577 case NVPTX::SUST_B_2D_V2B8_TRAP_R:
579 case NVPTX::SUST_B_2D_V2B16_TRAP_R:
581 case NVPTX::SUST_B_2D_V2B32_TRAP_R:
583 case NVPTX::SUST_B_2D_V2B64_TRAP_R:
585 case NVPTX::SUST_B_2D_V4B8_TRAP_R:
587 case NVPTX::SUST_B_2D_V4B16_TRAP_R:
589 case NVPTX::SUST_B_2D_V4B32_TRAP_R:
591 case NVPTX::SUST_B_2D_ARRAY_B8_TRAP_R:
593 case NVPTX::SUST_B_2D_ARRAY_B16_TRAP_R:
595 case NVPTX::SUST_B_2D_ARRAY_B32_TRAP_R:
597 case NVPTX::SUST_B_2D_ARRAY_B64_TRAP_R:
599 case NVPTX::SUST_B_2D_ARRAY_V2B8_TRAP_R:
601 case NVPTX::SUST_B_2D_ARRAY_V2B16_TRAP_R:
603 case NVPTX::SUST_B_2D_ARRAY_V2B32_TRAP_R:
605 case NVPTX::SUST_B_2D_ARRAY_V2B64_TRAP_R:
607 case NVPTX::SUST_B_2D_ARRAY_V4B8_TRAP_R:
609 case NVPTX::SUST_B_2D_ARRAY_V4B16_TRAP_R:
611 case NVPTX::SUST_B_2D_ARRAY_V4B32_TRAP_R:
613 case NVPTX::SUST_B_3D_B8_TRAP_R:
615 case NVPTX::SUST_B_3D_B16_TRAP_R:
617 case NVPTX::SUST_B_3D_B32_TRAP_R:
619 case NVPTX::SUST_B_3D_B64_TRAP_R:
621 case NVPTX::SUST_B_3D_V2B8_TRAP_R:
623 case NVPTX::SUST_B_3D_V2B16_TRAP_R:
625 case NVPTX::SUST_B_3D_V2B32_TRAP_R:
627 case NVPTX::SUST_B_3D_V2B64_TRAP_R:
629 case NVPTX::SUST_B_3D_V4B8_TRAP_R:
631 case NVPTX::SUST_B_3D_V4B16_TRAP_R:
633 case NVPTX::SUST_B_3D_V4B32_TRAP_R:
635 case NVPTX::SUST_B_1D_B8_ZERO_R:
637 case NVPTX::SUST_B_1D_B16_ZERO_R:
639 case NVPTX::SUST_B_1D_B32_ZERO_R:
641 case NVPTX::SUST_B_1D_B64_ZERO_R:
643 case NVPTX::SUST_B_1D_V2B8_ZERO_R:
645 case NVPTX::SUST_B_1D_V2B16_ZERO_R:
647 case NVPTX::SUST_B_1D_V2B32_ZERO_R:
649 case NVPTX::SUST_B_1D_V2B64_ZERO_R:
651 case NVPTX::SUST_B_1D_V4B8_ZERO_R:
653 case NVPTX::SUST_B_1D_V4B16_ZERO_R:
655 case NVPTX::SUST_B_1D_V4B32_ZERO_R:
657 case NVPTX::SUST_B_1D_ARRAY_B8_ZERO_R:
659 case NVPTX::SUST_B_1D_ARRAY_B16_ZERO_R:
661 case NVPTX::SUST_B_1D_ARRAY_B32_ZERO_R:
663 case NVPTX::SUST_B_1D_ARRAY_B64_ZERO_R:
665 case NVPTX::SUST_B_1D_ARRAY_V2B8_ZERO_R:
667 case NVPTX::SUST_B_1D_ARRAY_V2B16_ZERO_R:
669 case NVPTX::SUST_B_1D_ARRAY_V2B32_ZERO_R:
671 case NVPTX::SUST_B_1D_ARRAY_V2B64_ZERO_R:
673 case NVPTX::SUST_B_1D_ARRAY_V4B8_ZERO_R:
675 case NVPTX::SUST_B_1D_ARRAY_V4B16_ZERO_R:
677 case NVPTX::SUST_B_1D_ARRAY_V4B32_ZERO_R:
679 case NVPTX::SUST_B_2D_B8_ZERO_R:
681 case NVPTX::SUST_B_2D_B16_ZERO_R:
683 case NVPTX::SUST_B_2D_B32_ZERO_R:
685 case NVPTX::SUST_B_2D_B64_ZERO_R:
687 case NVPTX::SUST_B_2D_V2B8_ZERO_R:
689 case NVPTX::SUST_B_2D_V2B16_ZERO_R:
691 case NVPTX::SUST_B_2D_V2B32_ZERO_R:
693 case NVPTX::SUST_B_2D_V2B64_ZERO_R:
695 case NVPTX::SUST_B_2D_V4B8_ZERO_R:
697 case NVPTX::SUST_B_2D_V4B16_ZERO_R:
699 case NVPTX::SUST_B_2D_V4B32_ZERO_R:
701 case NVPTX::SUST_B_2D_ARRAY_B8_ZERO_R:
703 case NVPTX::SUST_B_2D_ARRAY_B16_ZERO_R:
705 case NVPTX::SUST_B_2D_ARRAY_B32_ZERO_R:
707 case NVPTX::SUST_B_2D_ARRAY_B64_ZERO_R:
709 case NVPTX::SUST_B_2D_ARRAY_V2B8_ZERO_R:
711 case NVPTX::SUST_B_2D_ARRAY_V2B16_ZERO_R:
713 case NVPTX::SUST_B_2D_ARRAY_V2B32_ZERO_R:
715 case NVPTX::SUST_B_2D_ARRAY_V2B64_ZERO_R:
717 case NVPTX::SUST_B_2D_ARRAY_V4B8_ZERO_R:
719 case NVPTX::SUST_B_2D_ARRAY_V4B16_ZERO_R:
721 case NVPTX::SUST_B_2D_ARRAY_V4B32_ZERO_R:
723 case NVPTX::SUST_B_3D_B8_ZERO_R:
725 case NVPTX::SUST_B_3D_B16_ZERO_R:
727 case NVPTX::SUST_B_3D_B32_ZERO_R:
729 case NVPTX::SUST_B_3D_B64_ZERO_R:
731 case NVPTX::SUST_B_3D_V2B8_ZERO_R:
733 case NVPTX::SUST_B_3D_V2B16_ZERO_R:
735 case NVPTX::SUST_B_3D_V2B32_ZERO_R:
737 case NVPTX::SUST_B_3D_V2B64_ZERO_R:
739 case NVPTX::SUST_B_3D_V4B8_ZERO_R:
741 case NVPTX::SUST_B_3D_V4B16_ZERO_R:
743 case NVPTX::SUST_B_3D_V4B32_ZERO_R:
745 case NVPTX::SUST_P_1D_B8_TRAP_R:
747 case NVPTX::SUST_P_1D_B16_TRAP_R:
749 case NVPTX::SUST_P_1D_B32_TRAP_R:
751 case NVPTX::SUST_P_1D_V2B8_TRAP_R:
753 case NVPTX::SUST_P_1D_V2B16_TRAP_R:
755 case NVPTX::SUST_P_1D_V2B32_TRAP_R:
757 case NVPTX::SUST_P_1D_V4B8_TRAP_R:
759 case NVPTX::SUST_P_1D_V4B16_TRAP_R:
761 case NVPTX::SUST_P_1D_V4B32_TRAP_R:
763 case NVPTX::SUST_P_1D_ARRAY_B8_TRAP_R:
765 case NVPTX::SUST_P_1D_ARRAY_B16_TRAP_R:
767 case NVPTX::SUST_P_1D_ARRAY_B32_TRAP_R:
769 case NVPTX::SUST_P_1D_ARRAY_V2B8_TRAP_R:
771 case NVPTX::SUST_P_1D_ARRAY_V2B16_TRAP_R:
773 case NVPTX::SUST_P_1D_ARRAY_V2B32_TRAP_R:
775 case NVPTX::SUST_P_1D_ARRAY_V4B8_TRAP_R:
777 case NVPTX::SUST_P_1D_ARRAY_V4B16_TRAP_R:
779 case NVPTX::SUST_P_1D_ARRAY_V4B32_TRAP_R:
781 case NVPTX::SUST_P_2D_B8_TRAP_R:
783 case NVPTX::SUST_P_2D_B16_TRAP_R:
785 case NVPTX::SUST_P_2D_B32_TRAP_R:
787 case NVPTX::SUST_P_2D_V2B8_TRAP_R:
789 case NVPTX::SUST_P_2D_V2B16_TRAP_R:
791 case NVPTX::SUST_P_2D_V2B32_TRAP_R:
793 case NVPTX::SUST_P_2D_V4B8_TRAP_R:
795 case NVPTX::SUST_P_2D_V4B16_TRAP_R:
797 case NVPTX::SUST_P_2D_V4B32_TRAP_R:
799 case NVPTX::SUST_P_2D_ARRAY_B8_TRAP_R:
801 case NVPTX::SUST_P_2D_ARRAY_B16_TRAP_R:
803 case NVPTX::SUST_P_2D_ARRAY_B32_TRAP_R:
805 case NVPTX::SUST_P_2D_ARRAY_V2B8_TRAP_R:
807 case NVPTX::SUST_P_2D_ARRAY_V2B16_TRAP_R:
809 case NVPTX::SUST_P_2D_ARRAY_V2B32_TRAP_R:
811 case NVPTX::SUST_P_2D_ARRAY_V4B8_TRAP_R:
813 case NVPTX::SUST_P_2D_ARRAY_V4B16_TRAP_R:
815 case NVPTX::SUST_P_2D_ARRAY_V4B32_TRAP_R:
817 case NVPTX::SUST_P_3D_B8_TRAP_R:
819 case NVPTX::SUST_P_3D_B16_TRAP_R:
821 case NVPTX::SUST_P_3D_B32_TRAP_R:
823 case NVPTX::SUST_P_3D_V2B8_TRAP_R:
825 case NVPTX::SUST_P_3D_V2B16_TRAP_R:
827 case NVPTX::SUST_P_3D_V2B32_TRAP_R:
829 case NVPTX::SUST_P_3D_V4B8_TRAP_R:
831 case NVPTX::SUST_P_3D_V4B16_TRAP_R:
833 case NVPTX::SUST_P_3D_V4B32_TRAP_R:
842 case NVPTX::TEX_1D_F32_S32_RR:
844 case NVPTX::TEX_1D_F32_S32_RI:
846 case NVPTX::TEX_1D_F32_F32_RR:
848 case NVPTX::TEX_1D_F32_F32_RI:
850 case NVPTX::TEX_1D_F32_F32_LEVEL_RR:
852 case NVPTX::TEX_1D_F32_F32_LEVEL_RI:
854 case NVPTX::TEX_1D_F32_F32_GRAD_RR:
856 case NVPTX::TEX_1D_F32_F32_GRAD_RI:
858 case NVPTX::TEX_1D_S32_S32_RR:
860 case NVPTX::TEX_1D_S32_S32_RI:
862 case NVPTX::TEX_1D_S32_F32_RR:
864 case NVPTX::TEX_1D_S32_F32_RI:
866 case NVPTX::TEX_1D_S32_F32_LEVEL_RR:
868 case NVPTX::TEX_1D_S32_F32_LEVEL_RI:
870 case NVPTX::TEX_1D_S32_F32_GRAD_RR:
872 case NVPTX::TEX_1D_S32_F32_GRAD_RI:
874 case NVPTX::TEX_1D_U32_S32_RR:
876 case NVPTX::TEX_1D_U32_S32_RI:
878 case NVPTX::TEX_1D_U32_F32_RR:
880 case NVPTX::TEX_1D_U32_F32_RI:
882 case NVPTX::TEX_1D_U32_F32_LEVEL_RR:
884 case NVPTX::TEX_1D_U32_F32_LEVEL_RI:
886 case NVPTX::TEX_1D_U32_F32_GRAD_RR:
888 case NVPTX::TEX_1D_U32_F32_GRAD_RI:
890 case NVPTX::TEX_1D_ARRAY_F32_S32_RR:
892 case NVPTX::TEX_1D_ARRAY_F32_S32_RI:
894 case NVPTX::TEX_1D_ARRAY_F32_F32_RR:
896 case NVPTX::TEX_1D_ARRAY_F32_F32_RI:
898 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RR:
900 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RI:
902 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RR:
904 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RI:
906 case NVPTX::TEX_1D_ARRAY_S32_S32_RR:
908 case NVPTX::TEX_1D_ARRAY_S32_S32_RI:
910 case NVPTX::TEX_1D_ARRAY_S32_F32_RR:
912 case NVPTX::TEX_1D_ARRAY_S32_F32_RI:
914 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RR:
916 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RI:
918 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RR:
920 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RI:
922 case NVPTX::TEX_1D_ARRAY_U32_S32_RR:
924 case NVPTX::TEX_1D_ARRAY_U32_S32_RI:
926 case NVPTX::TEX_1D_ARRAY_U32_F32_RR:
928 case NVPTX::TEX_1D_ARRAY_U32_F32_RI:
930 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RR:
932 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RI:
934 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RR:
936 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RI:
938 case NVPTX::TEX_2D_F32_S32_RR:
940 case NVPTX::TEX_2D_F32_S32_RI:
942 case NVPTX::TEX_2D_F32_F32_RR:
944 case NVPTX::TEX_2D_F32_F32_RI:
946 case NVPTX::TEX_2D_F32_F32_LEVEL_RR:
948 case NVPTX::TEX_2D_F32_F32_LEVEL_RI:
950 case NVPTX::TEX_2D_F32_F32_GRAD_RR:
952 case NVPTX::TEX_2D_F32_F32_GRAD_RI:
954 case NVPTX::TEX_2D_S32_S32_RR:
956 case NVPTX::TEX_2D_S32_S32_RI:
958 case NVPTX::TEX_2D_S32_F32_RR:
960 case NVPTX::TEX_2D_S32_F32_RI:
962 case NVPTX::TEX_2D_S32_F32_LEVEL_RR:
964 case NVPTX::TEX_2D_S32_F32_LEVEL_RI:
966 case NVPTX::TEX_2D_S32_F32_GRAD_RR:
968 case NVPTX::TEX_2D_S32_F32_GRAD_RI:
970 case NVPTX::TEX_2D_U32_S32_RR:
972 case NVPTX::TEX_2D_U32_S32_RI:
974 case NVPTX::TEX_2D_U32_F32_RR:
976 case NVPTX::TEX_2D_U32_F32_RI:
978 case NVPTX::TEX_2D_U32_F32_LEVEL_RR:
980 case NVPTX::TEX_2D_U32_F32_LEVEL_RI:
982 case NVPTX::TEX_2D_U32_F32_GRAD_RR:
984 case NVPTX::TEX_2D_U32_F32_GRAD_RI:
986 case NVPTX::TEX_2D_ARRAY_F32_S32_RR:
988 case NVPTX::TEX_2D_ARRAY_F32_S32_RI:
990 case NVPTX::TEX_2D_ARRAY_F32_F32_RR:
992 case NVPTX::TEX_2D_ARRAY_F32_F32_RI:
994 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RR:
996 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RI:
998 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RR:
1000 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RI:
1002 case NVPTX::TEX_2D_ARRAY_S32_S32_RR:
1004 case NVPTX::TEX_2D_ARRAY_S32_S32_RI:
1006 case NVPTX::TEX_2D_ARRAY_S32_F32_RR:
1008 case NVPTX::TEX_2D_ARRAY_S32_F32_RI:
1010 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RR:
1012 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RI:
1014 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RR:
1016 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RI:
1018 case NVPTX::TEX_2D_ARRAY_U32_S32_RR:
1020 case NVPTX::TEX_2D_ARRAY_U32_S32_RI:
1022 case NVPTX::TEX_2D_ARRAY_U32_F32_RR:
1024 case NVPTX::TEX_2D_ARRAY_U32_F32_RI:
1026 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RR:
1028 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RI:
1030 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RR:
1032 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RI:
1034 case NVPTX::TEX_3D_F32_S32_RR:
1036 case NVPTX::TEX_3D_F32_S32_RI:
1038 case NVPTX::TEX_3D_F32_F32_RR:
1040 case NVPTX::TEX_3D_F32_F32_RI:
1042 case NVPTX::TEX_3D_F32_F32_LEVEL_RR:
1044 case NVPTX::TEX_3D_F32_F32_LEVEL_RI:
1046 case NVPTX::TEX_3D_F32_F32_GRAD_RR:
1048 case NVPTX::TEX_3D_F32_F32_GRAD_RI:
1050 case NVPTX::TEX_3D_S32_S32_RR:
1052 case NVPTX::TEX_3D_S32_S32_RI:
1054 case NVPTX::TEX_3D_S32_F32_RR:
1056 case NVPTX::TEX_3D_S32_F32_RI:
1058 case NVPTX::TEX_3D_S32_F32_LEVEL_RR:
1060 case NVPTX::TEX_3D_S32_F32_LEVEL_RI:
1062 case NVPTX::TEX_3D_S32_F32_GRAD_RR:
1064 case NVPTX::TEX_3D_S32_F32_GRAD_RI:
1066 case NVPTX::TEX_3D_U32_S32_RR:
1068 case NVPTX::TEX_3D_U32_S32_RI:
1070 case NVPTX::TEX_3D_U32_F32_RR:
1072 case NVPTX::TEX_3D_U32_F32_RI:
1074 case NVPTX::TEX_3D_U32_F32_LEVEL_RR:
1076 case NVPTX::TEX_3D_U32_F32_LEVEL_RI:
1078 case NVPTX::TEX_3D_U32_F32_GRAD_RR:
1080 case NVPTX::TEX_3D_U32_F32_GRAD_RI:
1082 case NVPTX::TEX_CUBE_F32_F32_RR:
1084 case NVPTX::TEX_CUBE_F32_F32_RI:
1086 case NVPTX::TEX_CUBE_F32_F32_LEVEL_RR:
1088 case NVPTX::TEX_CUBE_F32_F32_LEVEL_RI:
1090 case NVPTX::TEX_CUBE_S32_F32_RR:
1092 case NVPTX::TEX_CUBE_S32_F32_RI:
1094 case NVPTX::TEX_CUBE_S32_F32_LEVEL_RR:
1096 case NVPTX::TEX_CUBE_S32_F32_LEVEL_RI:
1098 case NVPTX::TEX_CUBE_U32_F32_RR:
1100 case NVPTX::TEX_CUBE_U32_F32_RI:
1102 case NVPTX::TEX_CUBE_U32_F32_LEVEL_RR:
1104 case NVPTX::TEX_CUBE_U32_F32_LEVEL_RI:
1106 case NVPTX::TEX_CUBE_ARRAY_F32_F32_RR:
1108 case NVPTX::TEX_CUBE_ARRAY_F32_F32_RI:
1110 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RR:
1112 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RI:
1114 case NVPTX::TEX_CUBE_ARRAY_S32_F32_RR:
1116 case NVPTX::TEX_CUBE_ARRAY_S32_F32_RI:
1118 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RR:
1120 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RI:
1122 case NVPTX::TEX_CUBE_ARRAY_U32_F32_RR:
1124 case NVPTX::TEX_CUBE_ARRAY_U32_F32_RI:
1126 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_RR:
1128 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_RI:
1130 case NVPTX::TLD4_R_2D_F32_F32_RR:
1132 case NVPTX::TLD4_R_2D_F32_F32_RI:
1134 case NVPTX::TLD4_G_2D_F32_F32_RR:
1136 case NVPTX::TLD4_G_2D_F32_F32_RI:
1138 case NVPTX::TLD4_B_2D_F32_F32_RR:
1140 case NVPTX::TLD4_B_2D_F32_F32_RI:
1142 case NVPTX::TLD4_A_2D_F32_F32_RR:
1144 case NVPTX::TLD4_A_2D_F32_F32_RI:
1146 case NVPTX::TLD4_R_2D_S32_F32_RR:
1148 case NVPTX::TLD4_R_2D_S32_F32_RI:
1150 case NVPTX::TLD4_G_2D_S32_F32_RR:
1152 case NVPTX::TLD4_G_2D_S32_F32_RI:
1154 case NVPTX::TLD4_B_2D_S32_F32_RR:
1156 case NVPTX::TLD4_B_2D_S32_F32_RI:
1158 case NVPTX::TLD4_A_2D_S32_F32_RR:
1160 case NVPTX::TLD4_A_2D_S32_F32_RI:
1162 case NVPTX::TLD4_R_2D_U32_F32_RR:
1164 case NVPTX::TLD4_R_2D_U32_F32_RI:
1166 case NVPTX::TLD4_G_2D_U32_F32_RR:
1168 case NVPTX::TLD4_G_2D_U32_F32_RI:
1170 case NVPTX::TLD4_B_2D_U32_F32_RR:
1172 case NVPTX::TLD4_B_2D_U32_F32_RI:
1174 case NVPTX::TLD4_A_2D_U32_F32_RR:
1176 case NVPTX::TLD4_A_2D_U32_F32_RI:
1178 case NVPTX::TEX_UNIFIED_1D_F32_S32_R:
1180 case NVPTX::TEX_UNIFIED_1D_F32_F32_R:
1182 case NVPTX::TEX_UNIFIED_1D_F32_F32_LEVEL_R:
1184 case NVPTX::TEX_UNIFIED_1D_F32_F32_GRAD_R:
1186 case NVPTX::TEX_UNIFIED_1D_S32_S32_R:
1188 case NVPTX::TEX_UNIFIED_1D_S32_F32_R:
1190 case NVPTX::TEX_UNIFIED_1D_S32_F32_LEVEL_R:
1192 case NVPTX::TEX_UNIFIED_1D_S32_F32_GRAD_R:
1194 case NVPTX::TEX_UNIFIED_1D_U32_S32_R:
1196 case NVPTX::TEX_UNIFIED_1D_U32_F32_R:
1198 case NVPTX::TEX_UNIFIED_1D_U32_F32_LEVEL_R:
1200 case NVPTX::TEX_UNIFIED_1D_U32_F32_GRAD_R:
1202 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_S32_R:
1204 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_R:
1206 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_LEVEL_R:
1208 case NVPTX::TEX_UNIFIED_1D_ARRAY_F32_F32_GRAD_R:
1210 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_S32_R:
1212 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_R:
1214 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_LEVEL_R:
1216 case NVPTX::TEX_UNIFIED_1D_ARRAY_S32_F32_GRAD_R:
1218 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_S32_R:
1220 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_R:
1222 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_LEVEL_R:
1224 case NVPTX::TEX_UNIFIED_1D_ARRAY_U32_F32_GRAD_R:
1226 case NVPTX::TEX_UNIFIED_2D_F32_S32_R:
1228 case NVPTX::TEX_UNIFIED_2D_F32_F32_R:
1230 case NVPTX::TEX_UNIFIED_2D_F32_F32_LEVEL_R:
1232 case NVPTX::TEX_UNIFIED_2D_F32_F32_GRAD_R:
1234 case NVPTX::TEX_UNIFIED_2D_S32_S32_R:
1236 case NVPTX::TEX_UNIFIED_2D_S32_F32_R:
1238 case NVPTX::TEX_UNIFIED_2D_S32_F32_LEVEL_R:
1240 case NVPTX::TEX_UNIFIED_2D_S32_F32_GRAD_R:
1242 case NVPTX::TEX_UNIFIED_2D_U32_S32_R:
1244 case NVPTX::TEX_UNIFIED_2D_U32_F32_R:
1246 case NVPTX::TEX_UNIFIED_2D_U32_F32_LEVEL_R:
1248 case NVPTX::TEX_UNIFIED_2D_U32_F32_GRAD_R:
1250 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_S32_R:
1252 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_R:
1254 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_LEVEL_R:
1256 case NVPTX::TEX_UNIFIED_2D_ARRAY_F32_F32_GRAD_R:
1258 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_S32_R:
1260 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_R:
1262 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_LEVEL_R:
1264 case NVPTX::TEX_UNIFIED_2D_ARRAY_S32_F32_GRAD_R:
1266 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_S32_R:
1268 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_R:
1270 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_LEVEL_R:
1272 case NVPTX::TEX_UNIFIED_2D_ARRAY_U32_F32_GRAD_R:
1274 case NVPTX::TEX_UNIFIED_3D_F32_S32_R:
1276 case NVPTX::TEX_UNIFIED_3D_F32_F32_R:
1278 case NVPTX::TEX_UNIFIED_3D_F32_F32_LEVEL_R:
1280 case NVPTX::TEX_UNIFIED_3D_F32_F32_GRAD_R:
1282 case NVPTX::TEX_UNIFIED_3D_S32_S32_R:
1284 case NVPTX::TEX_UNIFIED_3D_S32_F32_R:
1286 case NVPTX::TEX_UNIFIED_3D_S32_F32_LEVEL_R:
1288 case NVPTX::TEX_UNIFIED_3D_S32_F32_GRAD_R:
1290 case NVPTX::TEX_UNIFIED_3D_U32_S32_R:
1292 case NVPTX::TEX_UNIFIED_3D_U32_F32_R:
1294 case NVPTX::TEX_UNIFIED_3D_U32_F32_LEVEL_R:
1296 case NVPTX::TEX_UNIFIED_3D_U32_F32_GRAD_R:
1298 case NVPTX::TEX_UNIFIED_CUBE_F32_F32_R:
1300 case NVPTX::TEX_UNIFIED_CUBE_F32_F32_LEVEL_R:
1302 case NVPTX::TEX_UNIFIED_CUBE_S32_F32_R:
1304 case NVPTX::TEX_UNIFIED_CUBE_S32_F32_LEVEL_R:
1306 case NVPTX::TEX_UNIFIED_CUBE_U32_F32_R:
1308 case NVPTX::TEX_UNIFIED_CUBE_U32_F32_LEVEL_R:
1310 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_R:
1312 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_LEVEL_R:
1314 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_R:
1316 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_LEVEL_R:
1318 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_R:
1320 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_LEVEL_R:
1322 case NVPTX::TEX_UNIFIED_CUBE_F32_F32_GRAD_R:
1324 case NVPTX::TEX_UNIFIED_CUBE_S32_F32_GRAD_R:
1326 case NVPTX::TEX_UNIFIED_CUBE_U32_F32_GRAD_R:
1328 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_F32_F32_GRAD_R:
1330 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_S32_F32_GRAD_R:
1332 case NVPTX::TEX_UNIFIED_CUBE_ARRAY_U32_F32_GRAD_R:
1334 case NVPTX::TLD4_UNIFIED_R_2D_F32_F32_R:
1336 case NVPTX::TLD4_UNIFIED_G_2D_F32_F32_R:
1338 case NVPTX::TLD4_UNIFIED_B_2D_F32_F32_R:
1340 case NVPTX::TLD4_UNIFIED_A_2D_F32_F32_R:
1342 case NVPTX::TLD4_UNIFIED_R_2D_S32_F32_R:
1344 case NVPTX::TLD4_UNIFIED_G_2D_S32_F32_R:
1346 case NVPTX::TLD4_UNIFIED_B_2D_S32_F32_R:
1348 case NVPTX::TLD4_UNIFIED_A_2D_S32_F32_R:
1350 case NVPTX::TLD4_UNIFIED_R_2D_U32_F32_R:
1352 case NVPTX::TLD4_UNIFIED_G_2D_U32_F32_R:
1354 case NVPTX::TLD4_UNIFIED_B_2D_U32_F32_R:
1356 case NVPTX::TLD4_UNIFIED_A_2D_U32_F32_R:
1365 case NVPTX::TEX_1D_F32_S32_RR:
1367 case NVPTX::TEX_1D_F32_S32_IR:
1369 case NVPTX::TEX_1D_F32_F32_RR:
1371 case NVPTX::TEX_1D_F32_F32_IR:
1373 case NVPTX::TEX_1D_F32_F32_LEVEL_RR:
1375 case NVPTX::TEX_1D_F32_F32_LEVEL_IR:
1377 case NVPTX::TEX_1D_F32_F32_GRAD_RR:
1379 case NVPTX::TEX_1D_F32_F32_GRAD_IR:
1381 case NVPTX::TEX_1D_S32_S32_RR:
1383 case NVPTX::TEX_1D_S32_S32_IR:
1385 case NVPTX::TEX_1D_S32_F32_RR:
1387 case NVPTX::TEX_1D_S32_F32_IR:
1389 case NVPTX::TEX_1D_S32_F32_LEVEL_RR:
1391 case NVPTX::TEX_1D_S32_F32_LEVEL_IR:
1393 case NVPTX::TEX_1D_S32_F32_GRAD_RR:
1395 case NVPTX::TEX_1D_S32_F32_GRAD_IR:
1397 case NVPTX::TEX_1D_U32_S32_RR:
1399 case NVPTX::TEX_1D_U32_S32_IR:
1401 case NVPTX::TEX_1D_U32_F32_RR:
1403 case NVPTX::TEX_1D_U32_F32_IR:
1405 case NVPTX::TEX_1D_U32_F32_LEVEL_RR:
1407 case NVPTX::TEX_1D_U32_F32_LEVEL_IR:
1409 case NVPTX::TEX_1D_U32_F32_GRAD_RR:
1411 case NVPTX::TEX_1D_U32_F32_GRAD_IR:
1413 case NVPTX::TEX_1D_ARRAY_F32_S32_RR:
1415 case NVPTX::TEX_1D_ARRAY_F32_S32_IR:
1417 case NVPTX::TEX_1D_ARRAY_F32_F32_RR:
1419 case NVPTX::TEX_1D_ARRAY_F32_F32_IR:
1421 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_RR:
1423 case NVPTX::TEX_1D_ARRAY_F32_F32_LEVEL_IR:
1425 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_RR:
1427 case NVPTX::TEX_1D_ARRAY_F32_F32_GRAD_IR:
1429 case NVPTX::TEX_1D_ARRAY_S32_S32_RR:
1431 case NVPTX::TEX_1D_ARRAY_S32_S32_IR:
1433 case NVPTX::TEX_1D_ARRAY_S32_F32_RR:
1435 case NVPTX::TEX_1D_ARRAY_S32_F32_IR:
1437 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_RR:
1439 case NVPTX::TEX_1D_ARRAY_S32_F32_LEVEL_IR:
1441 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_RR:
1443 case NVPTX::TEX_1D_ARRAY_S32_F32_GRAD_IR:
1445 case NVPTX::TEX_1D_ARRAY_U32_S32_RR:
1447 case NVPTX::TEX_1D_ARRAY_U32_S32_IR:
1449 case NVPTX::TEX_1D_ARRAY_U32_F32_RR:
1451 case NVPTX::TEX_1D_ARRAY_U32_F32_IR:
1453 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_RR:
1455 case NVPTX::TEX_1D_ARRAY_U32_F32_LEVEL_IR:
1457 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_RR:
1459 case NVPTX::TEX_1D_ARRAY_U32_F32_GRAD_IR:
1461 case NVPTX::TEX_2D_F32_S32_RR:
1463 case NVPTX::TEX_2D_F32_S32_IR:
1465 case NVPTX::TEX_2D_F32_F32_RR:
1467 case NVPTX::TEX_2D_F32_F32_IR:
1469 case NVPTX::TEX_2D_F32_F32_LEVEL_RR:
1471 case NVPTX::TEX_2D_F32_F32_LEVEL_IR:
1473 case NVPTX::TEX_2D_F32_F32_GRAD_RR:
1475 case NVPTX::TEX_2D_F32_F32_GRAD_IR:
1477 case NVPTX::TEX_2D_S32_S32_RR:
1479 case NVPTX::TEX_2D_S32_S32_IR:
1481 case NVPTX::TEX_2D_S32_F32_RR:
1483 case NVPTX::TEX_2D_S32_F32_IR:
1485 case NVPTX::TEX_2D_S32_F32_LEVEL_RR:
1487 case NVPTX::TEX_2D_S32_F32_LEVEL_IR:
1489 case NVPTX::TEX_2D_S32_F32_GRAD_RR:
1491 case NVPTX::TEX_2D_S32_F32_GRAD_IR:
1493 case NVPTX::TEX_2D_U32_S32_RR:
1495 case NVPTX::TEX_2D_U32_S32_IR:
1497 case NVPTX::TEX_2D_U32_F32_RR:
1499 case NVPTX::TEX_2D_U32_F32_IR:
1501 case NVPTX::TEX_2D_U32_F32_LEVEL_RR:
1503 case NVPTX::TEX_2D_U32_F32_LEVEL_IR:
1505 case NVPTX::TEX_2D_U32_F32_GRAD_RR:
1507 case NVPTX::TEX_2D_U32_F32_GRAD_IR:
1509 case NVPTX::TEX_2D_ARRAY_F32_S32_RR:
1511 case NVPTX::TEX_2D_ARRAY_F32_S32_IR:
1513 case NVPTX::TEX_2D_ARRAY_F32_F32_RR:
1515 case NVPTX::TEX_2D_ARRAY_F32_F32_IR:
1517 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_RR:
1519 case NVPTX::TEX_2D_ARRAY_F32_F32_LEVEL_IR:
1521 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_RR:
1523 case NVPTX::TEX_2D_ARRAY_F32_F32_GRAD_IR:
1525 case NVPTX::TEX_2D_ARRAY_S32_S32_RR:
1527 case NVPTX::TEX_2D_ARRAY_S32_S32_IR:
1529 case NVPTX::TEX_2D_ARRAY_S32_F32_RR:
1531 case NVPTX::TEX_2D_ARRAY_S32_F32_IR:
1533 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_RR:
1535 case NVPTX::TEX_2D_ARRAY_S32_F32_LEVEL_IR:
1537 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_RR:
1539 case NVPTX::TEX_2D_ARRAY_S32_F32_GRAD_IR:
1541 case NVPTX::TEX_2D_ARRAY_U32_S32_RR:
1543 case NVPTX::TEX_2D_ARRAY_U32_S32_IR:
1545 case NVPTX::TEX_2D_ARRAY_U32_F32_RR:
1547 case NVPTX::TEX_2D_ARRAY_U32_F32_IR:
1549 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_RR:
1551 case NVPTX::TEX_2D_ARRAY_U32_F32_LEVEL_IR:
1553 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_RR:
1555 case NVPTX::TEX_2D_ARRAY_U32_F32_GRAD_IR:
1557 case NVPTX::TEX_3D_F32_S32_RR:
1559 case NVPTX::TEX_3D_F32_S32_IR:
1561 case NVPTX::TEX_3D_F32_F32_RR:
1563 case NVPTX::TEX_3D_F32_F32_IR:
1565 case NVPTX::TEX_3D_F32_F32_LEVEL_RR:
1567 case NVPTX::TEX_3D_F32_F32_LEVEL_IR:
1569 case NVPTX::TEX_3D_F32_F32_GRAD_RR:
1571 case NVPTX::TEX_3D_F32_F32_GRAD_IR:
1573 case NVPTX::TEX_3D_S32_S32_RR:
1575 case NVPTX::TEX_3D_S32_S32_IR:
1577 case NVPTX::TEX_3D_S32_F32_RR:
1579 case NVPTX::TEX_3D_S32_F32_IR:
1581 case NVPTX::TEX_3D_S32_F32_LEVEL_RR:
1583 case NVPTX::TEX_3D_S32_F32_LEVEL_IR:
1585 case NVPTX::TEX_3D_S32_F32_GRAD_RR:
1587 case NVPTX::TEX_3D_S32_F32_GRAD_IR:
1589 case NVPTX::TEX_3D_U32_S32_RR:
1591 case NVPTX::TEX_3D_U32_S32_IR:
1593 case NVPTX::TEX_3D_U32_F32_RR:
1595 case NVPTX::TEX_3D_U32_F32_IR:
1597 case NVPTX::TEX_3D_U32_F32_LEVEL_RR:
1599 case NVPTX::TEX_3D_U32_F32_LEVEL_IR:
1601 case NVPTX::TEX_3D_U32_F32_GRAD_RR:
1603 case NVPTX::TEX_3D_U32_F32_GRAD_IR:
1605 case NVPTX::TEX_CUBE_F32_F32_RR:
1607 case NVPTX::TEX_CUBE_F32_F32_IR:
1609 case NVPTX::TEX_CUBE_F32_F32_LEVEL_RR:
1611 case NVPTX::TEX_CUBE_F32_F32_LEVEL_IR:
1613 case NVPTX::TEX_CUBE_S32_F32_RR:
1615 case NVPTX::TEX_CUBE_S32_F32_IR:
1617 case NVPTX::TEX_CUBE_S32_F32_LEVEL_RR:
1619 case NVPTX::TEX_CUBE_S32_F32_LEVEL_IR:
1621 case NVPTX::TEX_CUBE_U32_F32_RR:
1623 case NVPTX::TEX_CUBE_U32_F32_IR:
1625 case NVPTX::TEX_CUBE_U32_F32_LEVEL_RR:
1627 case NVPTX::TEX_CUBE_U32_F32_LEVEL_IR:
1629 case NVPTX::TEX_CUBE_ARRAY_F32_F32_RR:
1631 case NVPTX::TEX_CUBE_ARRAY_F32_F32_IR:
1633 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_RR:
1635 case NVPTX::TEX_CUBE_ARRAY_F32_F32_LEVEL_IR:
1637 case NVPTX::TEX_CUBE_ARRAY_S32_F32_RR:
1639 case NVPTX::TEX_CUBE_ARRAY_S32_F32_IR:
1641 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_RR:
1643 case NVPTX::TEX_CUBE_ARRAY_S32_F32_LEVEL_IR:
1645 case NVPTX::TEX_CUBE_ARRAY_U32_F32_RR:
1647 case NVPTX::TEX_CUBE_ARRAY_U32_F32_IR:
1649 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_RR:
1651 case NVPTX::TEX_CUBE_ARRAY_U32_F32_LEVEL_IR:
1653 case NVPTX::TLD4_R_2D_F32_F32_RR:
1655 case NVPTX::TLD4_R_2D_F32_F32_IR:
1657 case NVPTX::TLD4_G_2D_F32_F32_RR:
1659 case NVPTX::TLD4_G_2D_F32_F32_IR:
1661 case NVPTX::TLD4_B_2D_F32_F32_RR:
1663 case NVPTX::TLD4_B_2D_F32_F32_IR:
1665 case NVPTX::TLD4_A_2D_F32_F32_RR:
1667 case NVPTX::TLD4_A_2D_F32_F32_IR:
1669 case NVPTX::TLD4_R_2D_S32_F32_RR:
1671 case NVPTX::TLD4_R_2D_S32_F32_IR:
1673 case NVPTX::TLD4_G_2D_S32_F32_RR:
1675 case NVPTX::TLD4_G_2D_S32_F32_IR:
1677 case NVPTX::TLD4_B_2D_S32_F32_RR:
1679 case NVPTX::TLD4_B_2D_S32_F32_IR:
1681 case NVPTX::TLD4_A_2D_S32_F32_RR:
1683 case NVPTX::TLD4_A_2D_S32_F32_IR:
1685 case NVPTX::TLD4_R_2D_U32_F32_RR:
1687 case NVPTX::TLD4_R_2D_U32_F32_IR:
1689 case NVPTX::TLD4_G_2D_U32_F32_RR:
1691 case NVPTX::TLD4_G_2D_U32_F32_IR:
1693 case NVPTX::TLD4_B_2D_U32_F32_RR:
1695 case NVPTX::TLD4_B_2D_U32_F32_IR:
1697 case NVPTX::TLD4_A_2D_U32_F32_RR:
1699 case NVPTX::TLD4_A_2D_U32_F32_IR:
1708 case NVPTX::TXQ_CHANNEL_ORDER_R:
1710 case NVPTX::TXQ_CHANNEL_DATA_TYPE_R:
1712 case NVPTX::TXQ_WIDTH_R:
1714 case NVPTX::TXQ_HEIGHT_R:
1716 case NVPTX::TXQ_DEPTH_R:
1718 case NVPTX::TXQ_ARRAY_SIZE_R:
1720 case NVPTX::TXQ_NUM_SAMPLES_R:
1722 case NVPTX::TXQ_NUM_MIPMAP_LEVELS_R:
1724 case NVPTX::SUQ_CHANNEL_ORDER_R:
1726 case NVPTX::SUQ_CHANNEL_DATA_TYPE_R:
1728 case NVPTX::SUQ_WIDTH_R:
1730 case NVPTX::SUQ_HEIGHT_R:
1732 case NVPTX::SUQ_DEPTH_R:
1734 case NVPTX::SUQ_ARRAY_SIZE_R:
1813 case NVPTX::LD_i64_avar: {
1837 case NVPTX::texsurf_handles: {
1846 case NVPTX::nvvm_move_i64:
1847 case TargetOpcode::COPY: {