44   if (DestRC == &NVPTX::Int1RegsRegClass) {  in copyPhysReg()
45     Op = NVPTX::IMOV1rr;  in copyPhysReg()
46   } else if (DestRC == &NVPTX::Int16RegsRegClass) {  in copyPhysReg()
47     Op = NVPTX::IMOV16rr;  in copyPhysReg()
48   } else if (DestRC == &NVPTX::Int32RegsRegClass) {  in copyPhysReg()
49     Op = (SrcRC == &NVPTX::Int32RegsRegClass ? NVPTX::IMOV32rr  in copyPhysReg()
50                                              : NVPTX::BITCONVERT_32_F2I);  in copyPhysReg()
51   } else if (DestRC == &NVPTX::Int64RegsRegClass) {  in copyPhysReg()
52     Op = (SrcRC == &NVPTX::Int64RegsRegClass ? NVPTX::IMOV64rr  in copyPhysReg()
53                                              : NVPTX::BITCONVERT_64_F2I);  in copyPhysReg()
54   } else if (DestRC == &NVPTX::Int128RegsRegClass) {  in copyPhysReg()
55     Op = NVPTX::IMOV128rr;  in copyPhysReg()
56   } else if (DestRC == &NVPTX::Float32RegsRegClass) {  in copyPhysReg()
57     Op = (SrcRC == &NVPTX::Float32RegsRegClass ? NVPTX::FMOV32rr  in copyPhysReg()
58                                                : NVPTX::BITCONVERT_32_I2F);  in copyPhysReg()
59   } else if (DestRC == &NVPTX::Float64RegsRegClass) {  in copyPhysReg()
60     Op = (SrcRC == &NVPTX::Float64RegsRegClass ? NVPTX::FMOV64rr  in copyPhysReg()
61                                                : NVPTX::BITCONVERT_64_I2F);  in copyPhysReg()
107     if (LastInst.getOpcode() == NVPTX::GOTO) {  in analyzeBranch()
110     } else if (LastInst.getOpcode() == NVPTX::CBranch) {  in analyzeBranch()
128   if (SecondLastInst.getOpcode() == NVPTX::CBranch &&  in analyzeBranch()
129       LastInst.getOpcode() == NVPTX::GOTO) {  in analyzeBranch()
138   if (SecondLastInst.getOpcode() == NVPTX::GOTO &&  in analyzeBranch()
139       LastInst.getOpcode() == NVPTX::GOTO) {  in analyzeBranch()
158   if (I->getOpcode() != NVPTX::GOTO && I->getOpcode() != NVPTX::CBranch)  in removeBranch()
169   if (I->getOpcode() != NVPTX::CBranch)  in removeBranch()
193       BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(TBB);  in insertBranch()
195       BuildMI(&MBB, DL, get(NVPTX::CBranch)).add(Cond[0]).addMBB(TBB);  in insertBranch()
200   BuildMI(&MBB, DL, get(NVPTX::CBranch)).add(Cond[0]).addMBB(TBB);  in insertBranch()
201   BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(FBB);  in insertBranch()