95   // align them to 32 bits. 64 bit integers have natural alignment.  in computeDataLayout()
96   Ret += "-i8:8:32-i16:16:32-i64:64";  in computeDataLayout()
98   // 32 bit registers are always available and the stack is at least 64 bit  in computeDataLayout()
99   // aligned. On N64 64 bit registers are also available and the stack is  in computeDataLayout()
102     Ret += "-n32:64-S128";  in computeDataLayout()
122                                      StringRef CPU, StringRef FS,  in MipsTargetMachine()  argument
129                         CPU, FS, Options, getEffectiveRelocModel(JIT, RM),  in MipsTargetMachine()
134       DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt),  in MipsTargetMachine()
135       NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",  in MipsTargetMachine()
137       Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",  in MipsTargetMachine()
151                                          StringRef CPU, StringRef FS,  in MipsebTargetMachine()  argument
156     : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}  in MipsebTargetMachine()
161                                          StringRef CPU, StringRef FS,  in MipselTargetMachine()  argument
166     : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}  in MipselTargetMachine()
175   std::string FS =  in getSubtargetImpl()  local
189     FS += FS.empty() ? "+mips16" : ",+mips16";  in getSubtargetImpl()
191     FS += FS.empty() ? "-mips16" : ",-mips16";  in getSubtargetImpl()
193     FS += FS.empty() ? "+micromips" : ",+micromips";  in getSubtargetImpl()
195     FS += FS.empty() ? "-micromips" : ",-micromips";  in getSubtargetImpl()
197     FS += FS.empty() ? "+soft-float" : ",+soft-float";  in getSubtargetImpl()
199   auto &I = SubtargetMap[CPU + FS];  in getSubtargetImpl()
206         TargetTriple, CPU, FS, isLittle, *this,  in getSubtargetImpl()