Lines Matching refs:SrcReg
86 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() argument
91 if (Mips::GPR32RegClass.contains(SrcReg)) { in copyPhysReg()
96 } else if (Mips::CCRRegClass.contains(SrcReg)) in copyPhysReg()
98 else if (Mips::FGR32RegClass.contains(SrcReg)) in copyPhysReg()
100 else if (Mips::HI32RegClass.contains(SrcReg)) { in copyPhysReg()
102 SrcReg = 0; in copyPhysReg()
103 } else if (Mips::LO32RegClass.contains(SrcReg)) { in copyPhysReg()
105 SrcReg = 0; in copyPhysReg()
106 } else if (Mips::HI32DSPRegClass.contains(SrcReg)) in copyPhysReg()
108 else if (Mips::LO32DSPRegClass.contains(SrcReg)) in copyPhysReg()
110 else if (Mips::DSPCCRegClass.contains(SrcReg)) { in copyPhysReg()
112 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
115 else if (Mips::MSACtrlRegClass.contains(SrcReg)) in copyPhysReg()
118 else if (Mips::GPR32RegClass.contains(SrcReg)) { // Copy from CPU Reg. in copyPhysReg()
133 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1 << 4) in copyPhysReg()
139 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
143 else if (Mips::FGR32RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
145 else if (Mips::AFGR64RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
147 else if (Mips::FGR64RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
150 if (Mips::GPR64RegClass.contains(SrcReg)) in copyPhysReg()
152 else if (Mips::HI64RegClass.contains(SrcReg)) in copyPhysReg()
153 Opc = Mips::MFHI64, SrcReg = 0; in copyPhysReg()
154 else if (Mips::LO64RegClass.contains(SrcReg)) in copyPhysReg()
155 Opc = Mips::MFLO64, SrcReg = 0; in copyPhysReg()
156 else if (Mips::FGR64RegClass.contains(SrcReg)) in copyPhysReg()
159 else if (Mips::GPR64RegClass.contains(SrcReg)) { // Copy from CPU64 Reg. in copyPhysReg()
168 if (Mips::MSA128BRegClass.contains(SrcReg)) in copyPhysReg()
179 if (SrcReg) in copyPhysReg()
180 MIB.addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
216 Register SrcReg, bool isKill, int FI, in storeRegToStack() argument
270 SrcReg = Mips::K0; in storeRegToStack()
273 SrcReg = Mips::K0_64; in storeRegToStack()
276 SrcReg = Mips::K0; in storeRegToStack()
279 SrcReg = Mips::K0_64; in storeRegToStack()
284 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) in storeRegToStack()
733 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
747 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc); in expandCvtFPInt()
756 Register SrcReg = I->getOperand(1).getReg(); in expandExtractElementF64() local
762 Register SubReg = getRegisterInfo().getSubReg(SrcReg, SubIdx); in expandExtractElementF64()
789 .addReg(SrcReg); in expandExtractElementF64()