Lines Matching +full:upper +full:- +full:cal
1 //===-- MipsSEISelDAGToDAG.cpp - A Dag to Dag Inst Selector for MipsSE ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
38 #define DEBUG_TYPE "mips-isel"
42 if (Subtarget->inMips16Mode()) in runOnMachineFunction()
79 uint64_t RegNum = RegIdx->getAsZExtVal(); in getMSACtrlReg()
106 for (MachineRegisterInfo::use_iterator U = MRI->use_begin(DstReg), in replaceUsesWithZeroReg()
107 E = MRI->use_end(); U != E;) { in replaceUsesWithZeroReg()
114 if (MI->isPHI() || MI->isRegTiedToDefOperand(OpNo) || MI->isPseudo()) in replaceUsesWithZeroReg()
119 if (!MRI->getRegClass(MO.getReg())->contains(ZeroReg)) in replaceUsesWithZeroReg()
131 if (!Subtarget->isABI_O32()) { // N32, N64 in emitMCountABI()
133 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::OR64)) in emitMCountABI()
141 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::OR)) in emitMCountABI()
146 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::ADDiu)) in emitMCountABI()
149 .addImm(-8); in emitMCountABI()
156 MF.getInfo<MipsFunctionInfo>()->initGlobalBaseReg(MF); in processFunctionAfterISel()
171 if (!Subtarget->useOddSPReg()) { in processFunctionAfterISel()
178 if (Subtarget->isABI_FPXX() && !Subtarget->hasMTHC1()) in processFunctionAfterISel()
184 MI.getOperand(0).getGlobal()->getGlobalIdentifier() == "_mcount") in processFunctionAfterISel()
191 MI.getOperand(2).getMCSymbol()->getName() == "_mcount") in processFunctionAfterISel()
196 MI.getOperand(3).getMCSymbol()->getName() == "_mcount") in processFunctionAfterISel()
207 SDValue InGlue = Node->getOperand(2); in selectAddE()
209 SDValue LHS = Node->getOperand(0), RHS = Node->getOperand(1); in selectAddE()
216 CurDAG->SelectNodeTo(Node, Mips::ADDWC, VT, MVT::Glue, Ops); in selectAddE()
234 SDValue CstOne = CurDAG->getTargetConstant(1, DL, MVT::i32); in selectAddE()
236 SDValue OuFlag = CurDAG->getTargetConstant(20, DL, MVT::i32); in selectAddE()
238 SDNode *DSPCtrlField = CurDAG->getMachineNode(Mips::RDDSP, DL, MVT::i32, in selectAddE()
241 SDNode *Carry = CurDAG->getMachineNode( in selectAddE()
245 CurDAG->getTargetConstant(6, DL, MVT::i32), CstOne, in selectAddE()
247 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE()
254 SDValue Zero = CurDAG->getRegister(Mips::ZERO, MVT::i32); in selectAddE()
258 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE()
260 SDNode *WrDSP = CurDAG->getMachineNode(Mips::WRDSP, DL, MVT::Glue, in selectAddE()
264 CurDAG->SelectNodeTo(Node, Mips::ADDWC, VT, MVT::Glue, Operands); in selectAddE()
273 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy); in selectAddrFrameIndex()
274 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), ValTy); in selectAddrFrameIndex()
284 if (CurDAG->isBaseWithConstantOffset(Addr)) { in selectAddrFrameIndexOffset()
286 if (isIntN(OffsetBits + ShiftAmount, CN->getSExtValue())) { in selectAddrFrameIndexOffset()
292 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy); in selectAddrFrameIndexOffset()
298 if (!isAligned(Alignment, CN->getZExtValue())) in selectAddrFrameIndexOffset()
302 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), SDLoc(Addr), in selectAddrFrameIndexOffset()
365 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), Addr.getValueType()); in selectAddrDefault()
386 /// Used on microMIPS LWC2, LDC2, SWC2 and SDC2 instructions (11-bit offset)
398 /// Used on microMIPS Load/Store unaligned instructions (12-bit offset)
446 unsigned CnstOff = CN->getZExtValue(); in selectIntAddrLSL2MM()
513 if (!Subtarget->hasMSA()) in selectVSplat()
525 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in selectVSplat()
526 MinSizeInBits, !Subtarget->isLittle())) in selectVSplat()
539 // * The splat value fits in an integer with the specified signed-ness and
543 // TODO: This might not be appropriate for big-endian MSA since BITCAST is
544 // sometimes a shuffle in big-endian mode.
547 // of ldi.[bhwd] since it does not permit using the wrong-typed ldi.[bhwd]
554 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatCommon()
556 if (N->getOpcode() == ISD::BITCAST) in selectVSplatCommon()
557 N = N->getOperand(0); in selectVSplatCommon()
564 Imm = CurDAG->getTargetConstant(ImmValue, SDLoc(N), EltTy); in selectVSplatCommon()
626 // TODO: This might not be appropriate for big-endian MSA since BITCAST is
627 // sometimes a shuffle in big-endian mode.
630 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatUimmPow2()
632 if (N->getOpcode() == ISD::BITCAST) in selectVSplatUimmPow2()
633 N = N->getOperand(0); in selectVSplatUimmPow2()
639 if (Log2 != -1) { in selectVSplatUimmPow2()
640 Imm = CurDAG->getTargetConstant(Log2, SDLoc(N), EltTy); in selectVSplatUimmPow2()
649 // of left-most bits set (e.g. 0b11...1100...00).
654 // * The splat value is a consecutive sequence of left-most bits.
657 // TODO: This might not be appropriate for big-endian MSA since BITCAST is
658 // sometimes a shuffle in big-endian mode.
661 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatMaskL()
663 if (N->getOpcode() == ISD::BITCAST) in selectVSplatMaskL()
664 N = N->getOperand(0); in selectVSplatMaskL()
673 Imm = CurDAG->getTargetConstant(ImmValue.popcount() - 1, SDLoc(N), EltTy); in selectVSplatMaskL()
682 // of right-most bits set (e.g. 0b00...0011...11).
687 // * The splat value is a consecutive sequence of right-most bits.
690 // TODO: This might not be appropriate for big-endian MSA since BITCAST is
691 // sometimes a shuffle in big-endian mode.
694 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatMaskR()
696 if (N->getOpcode() == ISD::BITCAST) in selectVSplatMaskR()
697 N = N->getOperand(0); in selectVSplatMaskR()
704 Imm = CurDAG->getTargetConstant(ImmValue.popcount() - 1, SDLoc(N), EltTy); in selectVSplatMaskR()
715 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatUimmInvPow2()
717 if (N->getOpcode() == ISD::BITCAST) in selectVSplatUimmInvPow2()
718 N = N->getOperand(0); in selectVSplatUimmInvPow2()
724 if (Log2 != -1) { in selectVSplatUimmInvPow2()
725 Imm = CurDAG->getTargetConstant(Log2, SDLoc(N), EltTy); in selectVSplatUimmInvPow2()
736 EVT EltTy = N->getValueType(0).getVectorElementType(); in selectVSplatImmEq1()
738 if (N->getOpcode() == ISD::BITCAST) in selectVSplatImmEq1()
739 N = N->getOperand(0); in selectVSplatImmEq1()
746 unsigned Opcode = Node->getOpcode(); in trySelect()
750 // Instruction Selection not handled by the auto-generated in trySelect()
758 MVT VT = Subtarget->isGP64bit() ? MVT::i64 : MVT::i32; in trySelect()
759 SDValue cond = Node->getOperand(0); in trySelect()
760 SDValue Hi1 = Node->getOperand(1); in trySelect()
761 SDValue Lo1 = Node->getOperand(2); in trySelect()
762 SDValue Hi2 = Node->getOperand(3); in trySelect()
763 SDValue Lo2 = Node->getOperand(4); in trySelect()
767 ReplaceNode(Node, CurDAG->getMachineNode(Subtarget->isGP64bit() in trySelect()
781 if (Node->getValueType(0) == MVT::f64 && CN->isExactlyValue(+0.0)) { in trySelect()
782 if (Subtarget->isGP64bit()) { in trySelect()
783 SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, in trySelect()
786 CurDAG->getMachineNode(Mips::DMTC1, DL, MVT::f64, Zero)); in trySelect()
787 } else if (Subtarget->isFP64bit()) { in trySelect()
788 SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, in trySelect()
790 ReplaceNode(Node, CurDAG->getMachineNode(Mips::BuildPairF64_64, DL, in trySelect()
793 SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, in trySelect()
795 ReplaceNode(Node, CurDAG->getMachineNode(Mips::BuildPairF64, DL, in trySelect()
805 int64_t Imm = CN->getSExtValue(); in trySelect()
806 unsigned Size = CN->getValueSizeInBits(0); in trySelect()
819 SDValue ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), in trySelect()
825 if (Inst->Opc == Mips::LUi64) in trySelect()
826 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, ImmOpnd); in trySelect()
829 CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, in trySelect()
830 CurDAG->getRegister(Mips::ZERO_64, MVT::i64), in trySelect()
835 ImmOpnd = CurDAG->getTargetConstant(SignExtend64<16>(Inst->ImmOpnd), DL, in trySelect()
837 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, in trySelect()
846 const unsigned IntrinsicOpcode = Node->getConstantOperandVal(1); in trySelect()
852 SDValue ChainIn = Node->getOperand(0); in trySelect()
853 SDValue RegIdx = Node->getOperand(2); in trySelect()
854 SDValue Reg = CurDAG->getCopyFromReg(ChainIn, DL, in trySelect()
865 assert(Node->getNumOperands() == 4 && "Unexpected number of operands."); in trySelect()
866 const SDValue &Chain = Node->getOperand(0); in trySelect()
867 const SDValue &Intrinsic = Node->getOperand(1); in trySelect()
868 const SDValue &Pointer = Node->getOperand(2); in trySelect()
869 const SDValue &Constant = Node->getOperand(3); in trySelect()
879 cast<ConstantSDNode>(Constant)->getConstantIntValue(); in trySelect()
881 CurDAG->getTargetConstant(*Val, DL, Constant.getValueType()); in trySelect()
885 assert(Node->getNumValues() == 2); in trySelect()
886 assert(Node->getValueType(0).is128BitVector()); in trySelect()
887 assert(Node->getValueType(1) == MVT::Other); in trySelect()
888 SmallVector<EVT, 2> ResTys{Node->getValueType(0), Node->getValueType(1)}; in trySelect()
890 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
899 switch (Node->getConstantOperandVal(0)) { in trySelect()
906 ReplaceNode(Node, CurDAG->getMachineNode(Mips::MOVE_V, DL, in trySelect()
907 Node->getValueType(0), in trySelect()
908 Node->getOperand(1))); in trySelect()
915 const unsigned IntrinsicOpcode = Node->getConstantOperandVal(1); in trySelect()
921 SDValue ChainIn = Node->getOperand(0); in trySelect()
922 SDValue RegIdx = Node->getOperand(2); in trySelect()
923 SDValue Value = Node->getOperand(3); in trySelect()
924 SDValue ChainOut = CurDAG->getCopyToReg(ChainIn, DL, in trySelect()
935 assert(Node->getNumOperands() == 5 && "Unexpected number of operands."); in trySelect()
936 const SDValue &Chain = Node->getOperand(0); in trySelect()
937 const SDValue &Intrinsic = Node->getOperand(1); in trySelect()
938 const SDValue &Vec = Node->getOperand(2); in trySelect()
939 const SDValue &Pointer = Node->getOperand(3); in trySelect()
940 const SDValue &Constant = Node->getOperand(4); in trySelect()
950 cast<ConstantSDNode>(Constant)->getConstantIntValue(); in trySelect()
952 CurDAG->getTargetConstant(*Val, DL, Constant.getValueType()); in trySelect()
956 assert(Node->getNumValues() == 1); in trySelect()
957 assert(Node->getValueType(0) == MVT::Other); in trySelect()
958 SmallVector<EVT, 1> ResTys{Node->getValueType(0)}; in trySelect()
960 ReplaceNode(Node, CurDAG->getMachineNode(Op, DL, ResTys, Ops)); in trySelect()
968 MVT ResTy = Node->getSimpleValueType(0); in trySelect()
973 Opc = (Subtarget->isFP64bit() ? Mips::FABS_D64 : Mips::FABS_D32); in trySelect()
977 if (Subtarget->inMicroMipsMode()) { in trySelect()
994 CurDAG->getMachineNode(Opc, DL, ResTy, Node->getOperand(0))); in trySelect()
1008 if (Node->getValueType(0) != MVT::i32 && Node->getValueType(0) != MVT::i64) in trySelect()
1011 if (Node->getNumOperands() != 4) in trySelect()
1014 if (Node->getOperand(1)->getOpcode() != ISD::Constant || in trySelect()
1015 Node->getOperand(2)->getOpcode() != ISD::Constant) in trySelect()
1018 MVT ResTy = Node->getSimpleValueType(0); in trySelect()
1019 uint64_t Pos = Node->getConstantOperandVal(1); in trySelect()
1020 uint64_t Size = Node->getConstantOperandVal(2); in trySelect()
1047 Node->getOperand(0), CurDAG->getTargetConstant(Pos, DL, MVT::i32), in trySelect()
1048 CurDAG->getTargetConstant(Size, DL, MVT::i32), Node->getOperand(3)}; in trySelect()
1050 ReplaceNode(Node, CurDAG->getMachineNode(Opcode, DL, ResTy, Ops)); in trySelect()
1058 EVT PtrVT = getTargetLowering()->getPointerTy(CurDAG->getDataLayout()); in trySelect()
1070 CurDAG->getMachineNode(RdhwrOpc, DL, Node->getValueType(0), MVT::Glue, in trySelect()
1071 CurDAG->getRegister(Mips::HWR29, MVT::i32), in trySelect()
1072 CurDAG->getTargetConstant(0, DL, MVT::i32)); in trySelect()
1073 SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL, DestReg, in trySelect()
1075 SDValue ResNode = CurDAG->getCopyFromReg(Chain, DL, DestReg, PtrVT, in trySelect()
1083 // 128-bit when MSA is enabled. Fixup any register class mismatches that in trySelect()
1089 // 0x01010101 } without using a constant pool. This would be sub-optimal in trySelect()
1090 // when // 'ldi.b wd, 1' is capable of producing that bit-pattern in the in trySelect()
1102 EVT ResVecTy = BVN->getValueType(0); in trySelect()
1105 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
1108 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in trySelect()
1110 !Subtarget->isLittle())) in trySelect()
1141 SDValue Imm = CurDAG->getTargetConstant(SplatValue, DL, in trySelect()
1144 Res = CurDAG->getMachineNode(LdiOp, DL, ViaVecTy, Imm); in trySelect()
1156 SDValue ZeroVal = CurDAG->getRegister( in trySelect()
1170 SDValue LoVal = CurDAG->getTargetConstant(Lo, DL, SplatMVT); in trySelect()
1172 Res = CurDAG->getMachineNode(ADDiuOp, DL, SplatMVT, ZeroVal, LoVal); in trySelect()
1173 Res = CurDAG->getMachineNode(FILLOp, DL, ViaVecTy, SDValue(Res, 0)); in trySelect()
1180 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1182 SDValue LoVal = CurDAG->getTargetConstant(Lo, DL, MVT::i32); in trySelect()
1183 SDValue HiVal = CurDAG->getTargetConstant(Hi, DL, MVT::i32); in trySelect()
1186 Res = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HiVal); in trySelect()
1189 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1194 CurDAG->getMachineNode(Mips::FILL_W, DL, MVT::v4i32, SDValue(Res, 0)); in trySelect()
1203 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1205 SDValue LoVal = CurDAG->getTargetConstant(Lo, DL, MVT::i32); in trySelect()
1206 SDValue HiVal = CurDAG->getTargetConstant(Hi, DL, MVT::i32); in trySelect()
1209 Res = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HiVal); in trySelect()
1212 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1215 Res = CurDAG->getMachineNode( in trySelect()
1217 CurDAG->getTargetConstant(((Hi >> 15) & 0x1), DL, MVT::i64), in trySelect()
1219 CurDAG->getTargetConstant(Mips::sub_32, DL, MVT::i64)); in trySelect()
1222 CurDAG->getMachineNode(Mips::FILL_D, DL, MVT::v2i64, SDValue(Res, 0)); in trySelect()
1246 // dati $res, $res, %highest(cal) in trySelect()
1255 SDValue LoVal = CurDAG->getTargetConstant(Lo, DL, MVT::i32); in trySelect()
1256 SDValue HiVal = CurDAG->getTargetConstant(Hi, DL, MVT::i32); in trySelect()
1257 SDValue HigherVal = CurDAG->getTargetConstant(Higher, DL, MVT::i32); in trySelect()
1258 SDValue HighestVal = CurDAG->getTargetConstant(Highest, DL, MVT::i32); in trySelect()
1259 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1275 // for the upper 32bits. in trySelect()
1278 Res = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HiVal); in trySelect()
1281 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1286 HiRes = CurDAG->getMachineNode(Mips::LUi, DL, MVT::i32, HighestVal); in trySelect()
1289 HiRes = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1295 Res = CurDAG->getMachineNode(Mips::FILL_W, DL, MVT::v4i32, in trySelect()
1298 Res = CurDAG->getMachineNode( in trySelect()
1301 CurDAG->getTargetConstant(1, DL, MVT::i32)); in trySelect()
1305 TLI->getRegClassFor(ViaVecTy.getSimpleVT()); in trySelect()
1307 Res = CurDAG->getMachineNode( in trySelect()
1309 CurDAG->getTargetConstant(RC->getID(), DL, MVT::i32)); in trySelect()
1311 Res = CurDAG->getMachineNode( in trySelect()
1313 CurDAG->getTargetConstant(0, DL, MVT::i32)); in trySelect()
1316 SDValue Zero64Val = CurDAG->getRegister(Mips::ZERO_64, MVT::i64); in trySelect()
1321 HiRes = CurDAG->getMachineNode( in trySelect()
1323 CurDAG->getTargetConstant(((Highest >> 15) & 0x1), DL, MVT::i64), in trySelect()
1325 CurDAG->getTargetConstant(Mips::sub_32, DL, MVT::i64)); in trySelect()
1328 Res = CurDAG->getMachineNode( in trySelect()
1330 CurDAG->getTargetConstant(((Hi >> 15) & 0x1), DL, MVT::i64), in trySelect()
1332 CurDAG->getTargetConstant(Mips::sub_32, DL, MVT::i64)); in trySelect()
1343 IntegerType::get(MF->getFunction().getContext(), 32); in trySelect()
1346 CurDAG->getConstant(*Const32, DL, MVT::i32), in trySelect()
1347 CurDAG->getConstant(*Const32, DL, MVT::i32), in trySelect()
1350 Res = CurDAG->getMachineNode(Mips::DINSU, DL, MVT::i64, Ops); in trySelect()
1352 Res = CurDAG->getMachineNode( in trySelect()
1354 CurDAG->getTargetConstant(0, DL, MVT::i32)); in trySelect()
1357 "Zero splat value handled by non-zero 64bit splat synthesis!"); in trySelect()
1359 Res = CurDAG->getMachineNode(Mips::FILL_D, DL, MVT::v2i64, in trySelect()
1374 const TargetRegisterClass *RC = TLI->getRegClassFor(ResVecTySimple); in trySelect()
1375 Res = CurDAG->getMachineNode(Mips::COPY_TO_REGCLASS, DL, in trySelect()
1377 CurDAG->getTargetConstant(RC->getID(), DL, in trySelect()
1407 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()
1413 // For now, support 9-bit signed offsets which is supportable by all in SelectInlineAsmMemoryOperand()
1421 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()
1426 if (Subtarget->inMicroMipsMode()) { in SelectInlineAsmMemoryOperand()
1427 // On microMIPS, they can handle 12-bit offsets. in SelectInlineAsmMemoryOperand()
1433 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
1434 // On MIPS32r6/MIPS64r6, they can only handle 9-bit offsets. in SelectInlineAsmMemoryOperand()
1441 // Prior to MIPS32r6/MIPS64r6, they can handle 16-bit offsets. in SelectInlineAsmMemoryOperand()
1446 // In all cases, 0-bit offsets are acceptable. in SelectInlineAsmMemoryOperand()
1448 OutOps.push_back(CurDAG->getTargetConstant(0, SDLoc(Op), MVT::i32)); in SelectInlineAsmMemoryOperand()