Lines Matching +full:3 +full:p0
80 const LLT p0 = LLT::pointer(0, 32); in MipsLegalizerInfo() local
109 Query, {{s32, p0, 8, NoAlignRequirements}, in MipsLegalizerInfo()
110 {s32, p0, 16, ST.systemSupportsUnalignedAccess()}, in MipsLegalizerInfo()
111 {s32, p0, 32, NoAlignRequirements}, in MipsLegalizerInfo()
112 {p0, p0, 32, NoAlignRequirements}, in MipsLegalizerInfo()
113 {s64, p0, 64, ST.systemSupportsUnalignedAccess()}})) in MipsLegalizerInfo()
116 Query, {{v16s8, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo()
117 {v8s16, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo()
118 {v4s32, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo()
119 {v2s64, p0, 128, NoAlignRequirements}})) in MipsLegalizerInfo()
127 if (!Query.Types[0].isScalar() || Query.Types[1] != p0 || in MipsLegalizerInfo()
163 .legalForTypesWithMemDesc({{s32, p0, s8, 8}, in MipsLegalizerInfo()
164 {s32, p0, s16, 8}}) in MipsLegalizerInfo()
176 .legalForCartesianProduct({p0, s32, s64}, {s32}) in MipsLegalizerInfo()
185 .legalFor({{p0, s32}}); in MipsLegalizerInfo()
188 .legalFor({p0}); in MipsLegalizerInfo()
191 .legalFor({p0, s32, s64}) in MipsLegalizerInfo()
215 .legalForCartesianProduct({s32}, {s32, p0}) in MipsLegalizerInfo()
224 .legalFor({{p0, s32}}); in MipsLegalizerInfo()
227 .legalFor({{s32, p0}}); in MipsLegalizerInfo()
230 .legalFor({p0}); in MipsLegalizerInfo()
233 .legalFor({p0}); in MipsLegalizerInfo()
236 .lowerFor({{p0, s32}}); in MipsLegalizerInfo()
239 .legalFor({p0}); in MipsLegalizerInfo()
357 // then MemSize. e.g. 8 = 4 + 4 , 6 = 4 + 2, 3 = 2 + 1. in legalizeCustom()
476 .add(MI.getOperand(3)) in SelectMSA3OpIntrinsic()
491 .add(MI.getOperand(3)); in MSA3OpIntrinsicToGeneric()