36                           const MipsRegisterBankInfo &RBI);
63   const MipsRegisterBankInfo &RBI;  member in __anonbf07d5ca0111::MipsInstructionSelector
82     const MipsRegisterBankInfo &RBI)  in MipsInstructionSelector()  argument
84       RBI(RBI),  in MipsInstructionSelector()
97   return RBI.getRegBank(Reg, MRI, TRI)->getID() == Mips::GPRBRegBankID;  in isRegInGprb()
102   return RBI.getRegBank(Reg, MRI, TRI)->getID() == Mips::FPRBRegBankID;  in isRegInFprb()
112   if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) {  in selectCopy()
152     return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI);  in materialize32BitImm()
158     return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI);  in materialize32BitImm()
165     return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI);  in materialize32BitImm()
173   if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))  in materialize32BitImm()
175   if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI))  in materialize32BitImm()
267   if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI))  in buildUnalignedStore()
282   if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI))  in buildUnalignedLoad()
306     if (!constrainSelectedInstRegOperands(*Mul, TII, TRI, RBI))  in select()
330     if (!constrainSelectedInstRegOperands(*PseudoMULTu, TII, TRI, RBI))  in select()
336     if (!constrainSelectedInstRegOperands(*PseudoMove, TII, TRI, RBI))  in select()
372     if (!constrainSelectedInstRegOperands(*SLL, TII, TRI, RBI))  in select()
380     if (!constrainSelectedInstRegOperands(*ADDu, TII, TRI, RBI))  in select()
391     if (!constrainSelectedInstRegOperands(*LW, TII, TRI, RBI))  in select()
402       if (!constrainSelectedInstRegOperands(*ADDu, TII, TRI, RBI))  in select()
409     if (!constrainSelectedInstRegOperands(*Branch, TII, TRI, RBI))  in select()
430     return RBI.constrainGenericRegister(DestReg, *DefRC, MRI);  in select()
517     if (!constrainSelectedInstRegOperands(*PseudoDIV, TII, TRI, RBI))  in select()
524     if (!constrainSelectedInstRegOperands(*PseudoMove, TII, TRI, RBI))  in select()
556     if (!constrainSelectedInstRegOperands(*ExtractLo, TII, TRI, RBI))  in select()
563     if (!constrainSelectedInstRegOperands(*ExtractHi, TII, TRI, RBI))  in select()
600       if (!MTC1.constrainAllUses(TII, TRI, RBI))  in select()
615       if (!PairF64.constrainAllUses(TII, TRI, RBI))  in select()
649     if (!constrainSelectedInstRegOperands(*Trunc, TII, TRI, RBI))  in select()
655     if (!constrainSelectedInstRegOperands(*Move, TII, TRI, RBI))  in select()
680       if (!constrainSelectedInstRegOperands(*LWGOT, TII, TRI, RBI))  in select()
693         if (!constrainSelectedInstRegOperands(*ADDiu, TII, TRI, RBI))  in select()
703       if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))  in select()
712       if (!constrainSelectedInstRegOperands(*ADDiu, TII, TRI, RBI))  in select()
809       if (!MIB.constrainAllUses(TII, TRI, RBI))  in select()
880     if (!constrainSelectedInstRegOperands(*FCMP, TII, TRI, RBI))  in select()
888     if (!constrainSelectedInstRegOperands(*Move, TII, TRI, RBI))  in select()
908     if (!constrainSelectedInstRegOperands(*LEA_ADDiu, TII, TRI, RBI))  in select()
915     if (!constrainSelectedInstRegOperands(*Store, TII, TRI, RBI))  in select()
926   return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);  in select()
933                               const MipsRegisterBankInfo &RBI) {  in createMipsInstructionSelector()  argument
934   return new MipsInstructionSelector(TM, Subtarget, RBI);  in createMipsInstructionSelector()