Lines Matching refs:SDValue

79 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,  in selectAddrRegImm()
80 SDValue &Offset) const { in selectAddrRegImm()
85 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, in selectAddrDefault()
86 SDValue &Offset) const { in selectAddrDefault()
91 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, in selectIntAddr()
92 SDValue &Offset) const { in selectIntAddr()
97 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base, in selectIntAddr11MM()
98 SDValue &Offset) const { in selectIntAddr11MM()
103 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base, in selectIntAddr12MM()
104 SDValue &Offset) const { in selectIntAddr12MM()
109 bool MipsDAGToDAGISel::selectIntAddr16MM(SDValue Addr, SDValue &Base, in selectIntAddr16MM()
110 SDValue &Offset) const { in selectIntAddr16MM()
115 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, in selectIntAddrLSL2MM()
116 SDValue &Offset) const { in selectIntAddrLSL2MM()
121 bool MipsDAGToDAGISel::selectIntAddrSImm10(SDValue Addr, SDValue &Base, in selectIntAddrSImm10()
122 SDValue &Offset) const { in selectIntAddrSImm10()
127 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base, in selectIntAddrSImm10Lsl1()
128 SDValue &Offset) const { in selectIntAddrSImm10Lsl1()
133 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base, in selectIntAddrSImm10Lsl2()
134 SDValue &Offset) const { in selectIntAddrSImm10Lsl2()
139 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base, in selectIntAddrSImm10Lsl3()
140 SDValue &Offset) const { in selectIntAddrSImm10Lsl3()
145 bool MipsDAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base, in selectAddr16()
146 SDValue &Offset) { in selectAddr16()
151 bool MipsDAGToDAGISel::selectAddr16SP(SDValue Addr, SDValue &Base, in selectAddr16SP()
152 SDValue &Offset) { in selectAddr16SP()
163 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const { in selectVSplatUimm1()
168 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const { in selectVSplatUimm2()
173 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const { in selectVSplatUimm3()
178 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const { in selectVSplatUimm4()
183 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const { in selectVSplatUimm5()
188 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const { in selectVSplatUimm6()
193 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const { in selectVSplatUimm8()
198 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const { in selectVSplatSimm5()
203 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const { in selectVSplatUimmPow2()
208 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const { in selectVSplatUimmInvPow2()
213 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const { in selectVSplatMaskL()
218 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const { in selectVSplatMaskR()
223 bool MipsDAGToDAGISel::selectVSplatImmEq1(SDValue N) const { in selectVSplatImmEq1()
236 SDValue X = Node->getOperand(0); in selectVecAddAsVecSubIfProfitable()
237 SDValue C = Node->getOperand(1); in selectVecAddAsVecSubIfProfitable()
262 SDValue NegC = CurDAG->FoldConstantArithmetic( in selectVecAddAsVecSubIfProfitable()
265 SDValue NewNode = CurDAG->getNode(ISD::SUB, DL, VT, X, NegC); in selectVecAddAsVecSubIfProfitable()
318 const SDValue &Op, InlineAsm::ConstraintCode ConstraintID, in SelectInlineAsmMemoryOperand()
319 std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand()