Lines Matching refs:RegDefsUses
109 class RegDefsUses { class
111 RegDefsUses(const TargetRegisterInfo &TRI);
254 bool delayHasHazard(const MachineInstr &Candidate, RegDefsUses &RegDU,
261 RegDefsUses &RegDU, InspectMemInstr &IM, Iter Slot,
289 RegDefsUses &RegDU, bool &HasMultipleSuccs,
342 RegDefsUses::RegDefsUses(const TargetRegisterInfo &TRI) in RegDefsUses() function in RegDefsUses
345 void RegDefsUses::init(const MachineInstr &MI) { in init()
362 void RegDefsUses::setCallerSaved(const MachineInstr &MI) { in setCallerSaved()
388 void RegDefsUses::setUnallocatableRegs(const MachineFunction &MF) { in setUnallocatableRegs()
401 void RegDefsUses::addLiveOut(const MachineBasicBlock &MBB, in addLiveOut()
409 bool RegDefsUses::update(const MachineInstr &MI, unsigned Begin, unsigned End) { in update()
432 bool RegDefsUses::checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, in checkRegDefsUses()
445 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet()
692 IterTy End, RegDefsUses &RegDU, in searchRange()
779 RegDefsUses RegDU(*Fn->getSubtarget().getRegisterInfo()); in searchBackward()
805 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchForward()
833 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchSuccBBs()
924 RegDefsUses &RegDU, in examinePred()
946 RegDefsUses &RegDU, in delayHasHazard()