Lines Matching refs:RegDU
254 bool delayHasHazard(const MachineInstr &Candidate, RegDefsUses &RegDU,
261 RegDefsUses &RegDU, InspectMemInstr &IM, Iter Slot,
289 RegDefsUses &RegDU, bool &HasMultipleSuccs,
692 IterTy End, RegDefsUses &RegDU, in searchRange() argument
710 RegDU.update(*CurrI, 0, CurrI->getNumOperands()); in searchRange()
728 if (delayHasHazard(*CurrI, RegDU, IM)) in searchRange()
779 RegDefsUses RegDU(*Fn->getSubtarget().getRegisterInfo()); in searchBackward() local
783 RegDU.init(Slot); in searchBackward()
786 if (!searchRange(MBB, ++SlotI.getReverse(), MBB.rend(), RegDU, MemDU, Slot, in searchBackward()
805 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchForward() local
809 RegDU.setCallerSaved(*Slot); in searchForward()
811 if (!searchRange(MBB, std::next(Slot), MBB.end(), RegDU, NM, Slot, Filler)) { in searchForward()
833 RegDefsUses RegDU(*MBB.getParent()->getSubtarget().getRegisterInfo()); in searchSuccBBs() local
842 if (!examinePred(*Pred, *SuccBB, RegDU, HasMultipleSuccs, BrMap)) in searchSuccBBs()
847 RegDU.setUnallocatableRegs(*Fn); in searchSuccBBs()
858 if (!searchRange(MBB, SuccBB->begin(), SuccBB->end(), RegDU, *IM, Slot, in searchSuccBBs()
924 RegDefsUses &RegDU, in examinePred() argument
938 RegDU.addLiveOut(Pred, Succ); in examinePred()
946 RegDefsUses &RegDU, in delayHasHazard() argument
954 HasHazard |= RegDU.update(Candidate, 0, Candidate.getNumOperands()); in delayHasHazard()