Lines Matching refs:Mips
384 unsigned JR = ABI.IsN64() ? Mips::JR64 : Mips::JR; in buildProperJumpMI()
385 unsigned JIC = ABI.IsN64() ? Mips::JIC64 : Mips::JIC; in buildProperJumpMI()
386 unsigned JR_HB = ABI.IsN64() ? Mips::JR_HB64 : Mips::JR_HB; in buildProperJumpMI()
387 unsigned JR_HB_R6 = ABI.IsN64() ? Mips::JR_HB64_R6 : Mips::JR_HB_R6; in buildProperJumpMI()
395 if (JumpOp == Mips::JIC && STI->inMicroMipsMode()) in buildProperJumpMI()
396 JumpOp = Mips::JIC_MMR6; in buildProperJumpMI()
398 unsigned ATReg = ABI.IsN64() ? Mips::AT_64 : Mips::AT; in buildProperJumpMI()
434 ? STI->inMicroMipsMode() ? Mips::BALC_MMR6 : Mips::BALC in expandToLongBranch()
435 : STI->inMicroMipsMode() ? Mips::BAL_BR_MM : Mips::BAL_BR; in expandToLongBranch()
469 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
470 .addReg(Mips::SP) in expandToLongBranch()
472 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
473 .addReg(Mips::RA) in expandToLongBranch()
474 .addReg(Mips::SP) in expandToLongBranch()
493 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
500 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
501 .addReg(Mips::AT) in expandToLongBranch()
515 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
516 .addReg(Mips::RA) in expandToLongBranch()
517 .addReg(Mips::AT); in expandToLongBranch()
518 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
519 .addReg(Mips::SP) in expandToLongBranch()
530 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
531 .addReg(Mips::SP) in expandToLongBranch()
538 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
539 .addReg(Mips::SP) in expandToLongBranch()
592 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
593 .addReg(Mips::SP_64) in expandToLongBranch()
595 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)) in expandToLongBranch()
596 .addReg(Mips::RA_64) in expandToLongBranch()
597 .addReg(Mips::SP_64) in expandToLongBranch()
599 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu), in expandToLongBranch()
600 Mips::AT_64) in expandToLongBranch()
601 .addReg(Mips::ZERO_64) in expandToLongBranch()
604 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
605 .addReg(Mips::AT_64) in expandToLongBranch()
611 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64) in expandToLongBranch()
612 .addReg(Mips::AT_64) in expandToLongBranch()
626 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64) in expandToLongBranch()
627 .addReg(Mips::RA_64) in expandToLongBranch()
628 .addReg(Mips::AT_64); in expandToLongBranch()
629 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) in expandToLongBranch()
630 .addReg(Mips::SP_64) in expandToLongBranch()
636 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu), in expandToLongBranch()
637 Mips::SP_64) in expandToLongBranch()
638 .addReg(Mips::SP_64) in expandToLongBranch()
641 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
642 .addReg(Mips::SP_64) in expandToLongBranch()
663 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch()
670 TII->get(STI->inMicroMipsMode() ? Mips::BC_MMR6 : Mips::BC)) in expandToLongBranch()
679 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::J)).addMBB(TgtMBB); in expandToLongBranch()
688 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64), in expandToLongBranch()
689 Mips::AT_64) in expandToLongBranch()
691 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
692 Mips::AT_64) in expandToLongBranch()
693 .addReg(Mips::AT_64) in expandToLongBranch()
695 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
696 .addReg(Mips::AT_64) in expandToLongBranch()
698 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
699 Mips::AT_64) in expandToLongBranch()
700 .addReg(Mips::AT_64) in expandToLongBranch()
702 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
703 .addReg(Mips::AT_64) in expandToLongBranch()
705 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
706 Mips::AT_64) in expandToLongBranch()
707 .addReg(Mips::AT_64) in expandToLongBranch()
710 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op), in expandToLongBranch()
711 Mips::AT) in expandToLongBranch()
713 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op), in expandToLongBranch()
714 Mips::AT) in expandToLongBranch()
715 .addReg(Mips::AT) in expandToLongBranch()
736 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0) in emitGPDisp()
738 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
739 .addReg(Mips::V0) in emitGPDisp()
741 MBB.removeLiveIn(Mips::V0); in emitGPDisp()
767 std::next(Iit)->getOpcode() != Mips::NOP) { in handleSlot()