Lines Matching full:mi
32 static bool isReg(const MCInst &MI, unsigned OpNo) {
33 assert(MI.getOperand(OpNo).isReg() && "Register operand expected.");
34 return MI.getOperand(OpNo).getReg() == R;
80 void MipsInstPrinter::printInst(const MCInst *MI, uint64_t Address,
83 switch (MI->getOpcode()) {
93 printSaveRestore(MI, STI, O);
98 printSaveRestore(MI, STI, O);
103 printSaveRestore(MI, STI, O);
108 printSaveRestore(MI, STI, O);
114 if (!printAliasInstr(MI, Address, STI, O) &&
115 !printAlias(*MI, Address, STI, O))
116 printInstruction(MI, Address, STI, O);
119 switch (MI->getOpcode()) {
128 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
130 const MCOperand &Op = MI->getOperand(OpNo);
145 void MipsInstPrinter::printJumpOperand(const MCInst *MI, unsigned OpNo,
148 const MCOperand &Op = MI->getOperand(OpNo);
150 return printOperand(MI, OpNo, STI, O);
158 void MipsInstPrinter::printBranchOperand(const MCInst *MI, uint64_t Address,
162 const MCOperand &Op = MI->getOperand(OpNo);
164 return printOperand(MI, OpNo, STI, O);
179 void MipsInstPrinter::printUImm(const MCInst *MI, int opNum,
181 const MCOperand &MO = MI->getOperand(opNum);
191 printOperand(MI, opNum, STI, O);
194 void MipsInstPrinter::printMemOperand(const MCInst *MI, int opNum,
203 switch (MI->getOpcode()) {
212 opNum = MI->getNumOperands() - 2;
217 printOperand(MI, opNum + 1, STI, O);
219 printOperand(MI, opNum, STI, O);
223 void MipsInstPrinter::printMemOperandEA(const MCInst *MI, int opNum,
228 printOperand(MI, opNum, STI, O);
230 printOperand(MI, opNum + 1, STI, O);
233 void MipsInstPrinter::printFCCOperand(const MCInst *MI, int opNum,
236 const MCOperand &MO = MI->getOperand(opNum);
241 printSHFMask(const MCInst *MI, int opNum, raw_ostream &O) {
245 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
251 printBranchOperand(&MI, Address, OpNo, STI, OS);
253 printOperand(&MI, OpNo, STI, OS);
257 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
261 printAlias(Str, MI, Address, OpNo0, STI, OS, IsBranch);
264 printBranchOperand(&MI, Address, OpNo1, STI, OS);
266 printOperand(&MI, OpNo1, STI, OS);
270 bool MipsInstPrinter::printAlias(const MCInst &MI, uint64_t Address,
272 switch (MI.getOpcode()) {
277 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) &&
278 printAlias("b", MI, Address, 2, STI, OS, true)) ||
279 (isReg<Mips::ZERO>(MI, 1) &&
280 printAlias("beqz", MI, Address, 0, 2, STI, OS, true));
283 return isReg<Mips::ZERO_64>(MI, 1) &&
284 printAlias("beqz", MI, Address, 0, 2, STI, OS, true);
288 return isReg<Mips::ZERO>(MI, 1) &&
289 printAlias("bnez", MI, Address, 0, 2, STI, OS, true);
292 return isReg<Mips::ZERO_64>(MI, 1) &&
293 printAlias("bnez", MI, Address, 0, 2, STI, OS, true);
296 return isReg<Mips::ZERO>(MI, 0) &&
297 printAlias("bal", MI, Address, 1, STI, OS, true);
300 return isReg<Mips::FCC0>(MI, 0) &&
301 printAlias("bc1t", MI, Address, 1, STI, OS, true);
304 return isReg<Mips::FCC0>(MI, 0) &&
305 printAlias("bc1f", MI, Address, 1, STI, OS, true);
309 return (isReg<Mips::ZERO>(MI, 0) &&
310 printAlias("jr", MI, Address, 1, STI, OS)) ||
311 (isReg<Mips::RA>(MI, 0) &&
312 printAlias("jalr", MI, Address, 1, STI, OS));
316 return (isReg<Mips::ZERO_64>(MI, 0) &&
317 printAlias("jr", MI, Address, 1, STI, OS)) ||
318 (isReg<Mips::RA_64>(MI, 0) &&
319 printAlias("jalr", MI, Address, 1, STI, OS));
324 return isReg<Mips::ZERO>(MI, 2) &&
325 printAlias("not", MI, Address, 0, 1, STI, OS);
328 return isReg<Mips::ZERO_64>(MI, 2) &&
329 printAlias("not", MI, Address, 0, 1, STI, OS);
334 return isReg<Mips::ZERO>(MI, 2) &&
335 printAlias("move", MI, Address, 0, 1, STI, OS);
341 void MipsInstPrinter::printSaveRestore(const MCInst *MI,
344 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
346 if (MI->getOperand(i).isReg())
347 printRegName(O, MI->getOperand(i).getReg());
349 printUImm<16>(MI, i, STI, O);
353 void MipsInstPrinter::printRegisterList(const MCInst *MI, int opNum,
358 for (int i = opNum, e = MI->getNumOperands() - 2; i != e; ++i) {
361 printRegName(O, MI->getOperand(i).getReg());