919   unsigned getGPR32Reg() const {  in getGPR32Reg()  function in __anona2e40b320211::MipsOperand
1079     Inst.addOperand(MCOperand::createReg(getGPR32Reg()));  in addGPR32ZeroAsmRegOperands()
1084     Inst.addOperand(MCOperand::createReg(getGPR32Reg()));  in addGPR32NonZeroAsmRegOperands()
1089     Inst.addOperand(MCOperand::createReg(getGPR32Reg()));  in addGPR32AsmRegOperands()
1270                                              : getMemBase()->getGPR32Reg()));  in addMemOperands()
1385       && getMemBase()->isRegIdx() && (getMemBase()->getGPR32Reg() == Mips::SP);  in isMemWithUimmOffsetSP()
1391       && (getMemBase()->getGPR32Reg() == Mips::SP);  in isMemWithUimmWordAlignedOffsetSP()
1397       && (getMemBase()->getGPR32Reg() == Mips::GP);  in isMemWithSimmWordAlignedOffsetGP()
1466       return getGPR32Reg(); // FIXME: GPR64 too  in getReg()
6214   int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg());  in ConvertXWPOperands()
6489       Reg = isGP64bit() ? Operand.getGPR64Reg() : Operand.getGPR32Reg();  in tryParseRegister()
6864     RegNo = isGP64bit() ? Reg.getGPR64Reg() : Reg.getGPR32Reg();  in parseRegisterList()
7721   getTargetStreamer().emitDirectiveCpAdd(RegOpnd.getGPR32Reg());  in parseDirectiveCpAdd()
7753   getTargetStreamer().emitDirectiveCpLoad(RegOpnd.getGPR32Reg());  in parseDirectiveCpLoad()
7783   unsigned NewReg = RegOpnd.getGPR32Reg();  in parseDirectiveCpLocal()
7855   FuncReg = FuncRegOpnd.getGPR32Reg();  in parseDirectiveCPSetup()
7881     Save = SaveOpnd.getGPR32Reg();  in parseDirectiveCPSetup()
8747     unsigned StackReg = StackRegOpnd.getGPR32Reg();  in ParseDirective()
8799                                   ReturnRegOpnd.getGPR32Reg());  in ParseDirective()