Lines Matching refs:TmpReg
2789 unsigned TmpReg = DstReg; in loadImmediate() local
2797 TmpReg = ATReg; in loadImmediate()
2817 unsigned TmpReg = DstReg; in loadImmediate() local
2819 TmpReg = getATReg(IDLoc); in loadImmediate()
2820 if (!TmpReg) in loadImmediate()
2824 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, ImmValue, IDLoc, STI); in loadImmediate()
2826 TOut.emitRRR(ABI.GetPtrAdduOp(), DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2839 TOut.emitRI(Mips::LUi, TmpReg, 0xffff, IDLoc, STI); in loadImmediate()
2840 TOut.emitRRI(Mips::DSRL32, TmpReg, TmpReg, 0, IDLoc, STI); in loadImmediate()
2842 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2848 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits31To16, IDLoc, STI); in loadImmediate()
2849 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in loadImmediate()
2851 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI); in loadImmediate()
2853 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2857 TOut.emitRI(Mips::LUi, TmpReg, Bits31To16, IDLoc, STI); in loadImmediate()
2859 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI); in loadImmediate()
2861 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2880 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits, IDLoc, STI); in loadImmediate()
2881 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, ShiftAmount, IDLoc, STI); in loadImmediate()
2884 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
2896 if (loadImmediate(ImmValue >> 32, TmpReg, Mips::NoRegister, true, false, in loadImmediate()
2907 TOut.emitDSLL(TmpReg, TmpReg, ShiftCarriedForwards, IDLoc, STI); in loadImmediate()
2908 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, ImmChunk, IDLoc, STI); in loadImmediate()
2918 TOut.emitDSLL(TmpReg, TmpReg, ShiftCarriedForwards, IDLoc, STI); in loadImmediate()
2921 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
3032 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
3041 TmpReg = ATReg; in loadAndAddSymbolAddress()
3062 TOut.emitRX(Mips::LUi, TmpReg, MCOperand::createExpr(CallHiExpr), IDLoc, in loadAndAddSymbolAddress()
3064 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, TmpReg, TmpReg, GPReg, in loadAndAddSymbolAddress()
3066 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, TmpReg, in loadAndAddSymbolAddress()
3070 TOut.emitRRX(IsPtr64 ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg, in loadAndAddSymbolAddress()
3076 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, TmpReg, SrcReg, in loadAndAddSymbolAddress()
3133 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, GPReg, in loadAndAddSymbolAddress()
3137 TOut.emitRRX(IsPtr64 ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg, in loadAndAddSymbolAddress()
3141 TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, TmpReg, SrcReg, in loadAndAddSymbolAddress()
3265 unsigned TmpReg = DstReg; in loadAndAddSymbolAddress() local
3273 TmpReg = ATReg; in loadAndAddSymbolAddress()
3276 TOut.emitRX(Mips::LUi, TmpReg, MCOperand::createExpr(HiExpr), IDLoc, STI); in loadAndAddSymbolAddress()
3277 TOut.emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), in loadAndAddSymbolAddress()
3281 TOut.emitRRR(Mips::ADDu, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadAndAddSymbolAddress()
3284 getContext().getRegisterInfo()->isSuperOrSubRegisterEq(DstReg, TmpReg)); in loadAndAddSymbolAddress()
3459 unsigned TmpReg = Mips::ZERO; in expandLoadSingleImmToFPR() local
3461 TmpReg = getATReg(IDLoc); in expandLoadSingleImmToFPR()
3462 if (!TmpReg) in expandLoadSingleImmToFPR()
3467 if (TmpReg != Mips::ZERO && loadImmediate(ImmOp32, TmpReg, Mips::NoRegister, in expandLoadSingleImmToFPR()
3470 TOut.emitRR(Mips::MTC1, FirstReg, TmpReg, IDLoc, STI); in expandLoadSingleImmToFPR()
3493 TOut.emitRRX(Mips::LWC1, FirstReg, TmpReg, MCOperand::createExpr(LoExpr), in expandLoadSingleImmToFPR()
3544 unsigned TmpReg = getATReg(IDLoc); in expandLoadDoubleImmToGPR() local
3545 if (!TmpReg) in expandLoadDoubleImmToGPR()
3551 TOut.emitRRX(isABI_N64() ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg, in expandLoadDoubleImmToGPR()
3555 TOut.emitRRI(Mips::LD, FirstReg, TmpReg, 0, IDLoc, STI); in expandLoadDoubleImmToGPR()
3557 TOut.emitRRI(Mips::LW, FirstReg, TmpReg, 0, IDLoc, STI); in expandLoadDoubleImmToGPR()
3558 TOut.emitRRI(Mips::LW, nextReg(FirstReg), TmpReg, 4, IDLoc, STI); in expandLoadDoubleImmToGPR()
3576 unsigned TmpReg = Mips::ZERO; in expandLoadDoubleImmToFPR() local
3578 TmpReg = getATReg(IDLoc); in expandLoadDoubleImmToFPR()
3579 if (!TmpReg) in expandLoadDoubleImmToFPR()
3586 if (TmpReg != Mips::ZERO && in expandLoadDoubleImmToFPR()
3587 loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, false, IDLoc, in expandLoadDoubleImmToFPR()
3590 TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI); in expandLoadDoubleImmToFPR()
3594 if (TmpReg != Mips::ZERO && in expandLoadDoubleImmToFPR()
3595 loadImmediate(Hi_32(ImmOp64), TmpReg, Mips::NoRegister, true, false, in expandLoadDoubleImmToFPR()
3601 TOut.emitRRR(Mips::MTHC1_D32, FirstReg, FirstReg, TmpReg, IDLoc, STI); in expandLoadDoubleImmToFPR()
3603 TOut.emitRR(Mips::MTC1, nextReg(FirstReg), TmpReg, IDLoc, STI); in expandLoadDoubleImmToFPR()
3630 TOut.emitRRX(Is64FPU ? Mips::LDC164 : Mips::LDC1, FirstReg, TmpReg, in expandLoadDoubleImmToFPR()
3763 unsigned TmpReg = DstReg; in expandMem16Inst() local
3775 TmpReg = getATReg(IDLoc); in expandMem16Inst()
3776 if (!TmpReg) in expandMem16Inst()
3782 TOut.emitRRX(OpCode, DstReg, TmpReg, Off, IDLoc, STI); in expandMem16Inst()
3784 TOut.emitRRRX(OpCode, DstReg, DstReg, TmpReg, Off, IDLoc, STI); in expandMem16Inst()
3800 if (loadImmediate(HiOffset, TmpReg, Mips::NoRegister, Is32BitImm, true, in expandMem16Inst()
3806 TOut.emitRRR(ABI.ArePtrs64bit() ? Mips::DADDu : Mips::ADDu, TmpReg, in expandMem16Inst()
3807 TmpReg, BaseReg, IDLoc, STI); in expandMem16Inst()
3830 loadAndAddSymbolAddress(Res.getSymA(), TmpReg, BaseReg, in expandMem16Inst()
3851 TOut.emitRX(Mips::LUi, TmpReg, HighestOperand, IDLoc, STI); in expandMem16Inst()
3852 TOut.emitRRX(Mips::DADDiu, TmpReg, TmpReg, HigherOperand, IDLoc, STI); in expandMem16Inst()
3853 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
3854 TOut.emitRRX(Mips::DADDiu, TmpReg, TmpReg, HiOperand, IDLoc, STI); in expandMem16Inst()
3855 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
3857 TOut.emitRRR(Mips::DADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI); in expandMem16Inst()
3861 TOut.emitRX(Mips::LUi, TmpReg, HiOperand, IDLoc, STI); in expandMem16Inst()
3863 TOut.emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI); in expandMem16Inst()
3890 unsigned TmpReg = DstReg; in expandMem9Inst() local
3902 TmpReg = getATReg(IDLoc); in expandMem9Inst()
3903 if (!TmpReg) in expandMem9Inst()
3909 TOut.emitRRX(OpCode, DstReg, TmpReg, MCOperand::createImm(0), IDLoc, STI); in expandMem9Inst()
3911 TOut.emitRRRX(OpCode, DstReg, DstReg, TmpReg, MCOperand::createImm(0), in expandMem9Inst()
3916 loadImmediate(OffsetOp.getImm(), TmpReg, BaseReg, !ABI.ArePtrs64bit(), true, in expandMem9Inst()
3923 loadAndAddSymbolAddress(OffsetOp.getExpr(), TmpReg, BaseReg, in expandMem9Inst()
4572 unsigned TmpReg = SrcReg; in expandUxw() local
4575 TmpReg = getATReg(IDLoc); in expandUxw()
4576 if (!TmpReg) in expandUxw()
4581 if (loadImmediate(OffsetValue, TmpReg, SrcReg, !ABI.ArePtrs64bit(), true, in expandUxw()
4587 std::swap(DstReg, TmpReg); in expandUxw()
4591 TOut.emitRRI(XWL, DstReg, TmpReg, LxlOffset, IDLoc, STI); in expandUxw()
4592 TOut.emitRRI(XWR, DstReg, TmpReg, LxrOffset, IDLoc, STI); in expandUxw()
4595 TOut.emitRRR(Mips::OR, TmpReg, DstReg, Mips::ZERO, IDLoc, STI); in expandUxw()
4933 unsigned TmpReg = DReg; in expandRotation() local
4940 TmpReg = getATReg(Inst.getLoc()); in expandRotation()
4941 if (!TmpReg) in expandRotation()
4946 TOut.emitRRR(Mips::SUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI); in expandRotation()
4947 TOut.emitRRR(Mips::ROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI); in expandRotation()
5058 unsigned TmpReg = DReg; in expandDRotation() local
5064 if (TmpReg == SReg) { in expandDRotation()
5065 TmpReg = getATReg(Inst.getLoc()); in expandDRotation()
5066 if (!TmpReg) in expandDRotation()
5071 TOut.emitRRR(Mips::DSUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI); in expandDRotation()
5072 TOut.emitRRR(Mips::DROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI); in expandDRotation()
5253 unsigned TmpReg = Inst.getOperand(2).getReg(); in expandMulO() local
5260 SrcReg, TmpReg, IDLoc, STI); in expandMulO()
5295 unsigned TmpReg = Inst.getOperand(2).getReg(); in expandMulOU() local
5302 SrcReg, TmpReg, IDLoc, STI); in expandMulOU()
5330 unsigned TmpReg = Inst.getOperand(2).getReg(); in expandDMULMacro() local
5332 TOut.emitRR(Mips::DMULTu, SrcReg, TmpReg, IDLoc, STI); in expandDMULMacro()
6872 unsigned TmpReg = PrevReg + 1; in parseRegisterList() local
6873 while (TmpReg <= RegNo) { in parseRegisterList()
6874 if ((((TmpReg < Mips::S0) || (TmpReg > Mips::S7)) && !isGP64bit()) || in parseRegisterList()
6875 (((TmpReg < Mips::S0_64) || (TmpReg > Mips::S7_64)) && in parseRegisterList()
6879 PrevReg = TmpReg; in parseRegisterList()
6880 Regs.push_back(TmpReg++); in parseRegisterList()
7842 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in parseDirectiveCPSetup() local
7843 ParseStatus Res = parseAnyRegister(TmpReg); in parseDirectiveCPSetup()
7849 MipsOperand &FuncRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]); in parseDirectiveCPSetup()
7856 TmpReg.clear(); in parseDirectiveCPSetup()
7861 Res = parseAnyRegister(TmpReg); in parseDirectiveCPSetup()
7876 MipsOperand &SaveOpnd = static_cast<MipsOperand &>(*TmpReg[0]); in parseDirectiveCPSetup()
8734 SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> TmpReg; in ParseDirective() local
8735 ParseStatus Res = parseAnyRegister(TmpReg); in ParseDirective()
8741 MipsOperand &StackRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]); in ParseDirective()
8778 TmpReg.clear(); in ParseDirective()
8779 Res = parseAnyRegister(TmpReg); in ParseDirective()
8785 MipsOperand &ReturnRegOpnd = static_cast<MipsOperand &>(*TmpReg[0]); in ParseDirective()