891     struct RegIdxOp RegIdx;  member
906     Op->RegIdx.Index = Index;  in CreateReg()
907     Op->RegIdx.RegInfo = RegInfo;  in CreateReg()
908     Op->RegIdx.Kind = RegKind;  in CreateReg()
909     Op->RegIdx.Tok.Data = Str.data();  in CreateReg()
910     Op->RegIdx.Tok.Length = Str.size();  in CreateReg()
920     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPR32Reg()
921     AsmParser.warnIfRegIndexIsAT(RegIdx.Index, StartLoc);  in getGPR32Reg()
923     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getGPR32Reg()
929     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPRMM16Reg()
931     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getGPRMM16Reg()
937     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPR64Reg()
939     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getGPR64Reg()
946     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getAFGR64Reg()
947     if (RegIdx.Index % 2 != 0)  in getAFGR64Reg()
949     return RegIdx.RegInfo->getRegClass(Mips::AFGR64RegClassID)  in getAFGR64Reg()
950         .getRegister(RegIdx.Index / 2);  in getAFGR64Reg()
956     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGR64Reg()
957     return RegIdx.RegInfo->getRegClass(Mips::FGR64RegClassID)  in getFGR64Reg()
958         .getRegister(RegIdx.Index);  in getFGR64Reg()
964     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGR32Reg()
965     return RegIdx.RegInfo->getRegClass(Mips::FGR32RegClassID)  in getFGR32Reg()
966         .getRegister(RegIdx.Index);  in getFGR32Reg()
972     assert(isRegIdx() && (RegIdx.Kind & RegKind_FCC) && "Invalid access!");  in getFCCReg()
973     return RegIdx.RegInfo->getRegClass(Mips::FCCRegClassID)  in getFCCReg()
974         .getRegister(RegIdx.Index);  in getFCCReg()
980     assert(isRegIdx() && (RegIdx.Kind & RegKind_MSA128) && "Invalid access!");  in getMSA128Reg()
984     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getMSA128Reg()
990     assert(isRegIdx() && (RegIdx.Kind & RegKind_MSACtrl) && "Invalid access!");  in getMSACtrlReg()
992     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getMSACtrlReg()
998     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP0) && "Invalid access!");  in getCOP0Reg()
1000     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCOP0Reg()
1006     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP2) && "Invalid access!");  in getCOP2Reg()
1008     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCOP2Reg()
1014     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP3) && "Invalid access!");  in getCOP3Reg()
1016     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCOP3Reg()
1022     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getACC64DSPReg()
1024     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getACC64DSPReg()
1030     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getHI32DSPReg()
1032     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getHI32DSPReg()
1038     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getLO32DSPReg()
1040     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getLO32DSPReg()
1046     assert(isRegIdx() && (RegIdx.Kind & RegKind_CCR) && "Invalid access!");  in getCCRReg()
1048     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getCCRReg()
1054     assert(isRegIdx() && (RegIdx.Kind & RegKind_HWRegs) && "Invalid access!");  in getHWRegsReg()
1056     return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index);  in getHWRegsReg()
1151     if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)  in addFGR32AsmRegOperands()
1161     if (!AsmParser.useOddSPReg() && RegIdx.Index & 1)  in addStrictlyFGR32AsmRegOperands()
1295     return isGPRAsmReg() && RegIdx.Index == 0;  in isReg()
1464     if (Kind == k_RegisterIndex && RegIdx.Index == 0 &&  in getReg()
1465         RegIdx.Kind & RegKind_GPR)  in getReg()
1611     return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index == 0;  in isGPRZeroAsmReg()
1615    return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index > 0 &&  in isGPRNonZeroAsmReg()
1616           RegIdx.Index <= 31;  in isGPRNonZeroAsmReg()
1620     return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index <= 31;  in isGPRAsmReg()
1624     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmReg()
1626     return ((RegIdx.Index >= 2 && RegIdx.Index <= 7)  in isMM16AsmReg()
1627             || RegIdx.Index == 16 || RegIdx.Index == 17);  in isMM16AsmReg()
1631     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegZero()
1633     return (RegIdx.Index == 0 ||  in isMM16AsmRegZero()
1634             (RegIdx.Index >= 2 && RegIdx.Index <= 7) ||  in isMM16AsmRegZero()
1635             RegIdx.Index == 17);  in isMM16AsmRegZero()
1639     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMoveP()
1641     return (RegIdx.Index == 0 || (RegIdx.Index >= 2 && RegIdx.Index <= 3) ||  in isMM16AsmRegMoveP()
1642       (RegIdx.Index >= 16 && RegIdx.Index <= 20));  in isMM16AsmRegMoveP()
1646     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMovePPairFirst()
1648     return RegIdx.Index >= 4 && RegIdx.Index <= 6;  in isMM16AsmRegMovePPairFirst()
1652     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMovePPairSecond()
1654     return (RegIdx.Index == 21 || RegIdx.Index == 22 ||  in isMM16AsmRegMovePPairSecond()
1655       (RegIdx.Index >= 5 && RegIdx.Index <= 7));  in isMM16AsmRegMovePPairSecond()
1660     return isRegIdx() && RegIdx.Kind & RegKind_FGR && RegIdx.Index <= 31;  in isFGRAsmReg()
1665     return isRegIdx() && RegIdx.Kind == RegKind_FGR && RegIdx.Index <= 31;  in isStrictlyFGRAsmReg()
1669     return isRegIdx() && RegIdx.Kind & RegKind_HWRegs && RegIdx.Index <= 31;  in isHWRegsAsmReg()
1673     return isRegIdx() && RegIdx.Kind & RegKind_CCR && RegIdx.Index <= 31;  in isCCRAsmReg()
1677     if (!(isRegIdx() && RegIdx.Kind & RegKind_FCC))  in isFCCAsmReg()
1679     return RegIdx.Index <= 7;  in isFCCAsmReg()
1683     return isRegIdx() && RegIdx.Kind & RegKind_ACC && RegIdx.Index <= 3;  in isACCAsmReg()
1687     return isRegIdx() && RegIdx.Kind & RegKind_COP0 && RegIdx.Index <= 31;  in isCOP0AsmReg()
1691     return isRegIdx() && RegIdx.Kind & RegKind_COP2 && RegIdx.Index <= 31;  in isCOP2AsmReg()
1695     return isRegIdx() && RegIdx.Kind & RegKind_COP3 && RegIdx.Index <= 31;  in isCOP3AsmReg()
1699     return isRegIdx() && RegIdx.Kind & RegKind_MSA128 && RegIdx.Index <= 31;  in isMSA128AsmReg()
1703     return isRegIdx() && RegIdx.Kind & RegKind_MSACtrl && RegIdx.Index <= 7;  in isMSACtrlAsmReg()
1726       OS << "RegIdx<" << RegIdx.Index << ":" << RegIdx.Kind << ", "  in print()
1727          << StringRef(RegIdx.Tok.Data, RegIdx.Tok.Length) << ">";  in print()
1750       StringRef Token(RegIdx.Tok.Data, RegIdx.Tok.Length);  in isValidForTie()
1751       StringRef OtherToken(Other.RegIdx.Tok.Data, Other.RegIdx.Tok.Length);  in isValidForTie()