Lines Matching refs:FirstOffset
4474 int64_t FirstOffset = IsLargeOffset ? 0 : OffsetValue; in expandUlh() local
4477 std::swap(FirstOffset, SecondOffset); in expandUlh()
4486 FirstOffset, IDLoc, STI); in expandUlh()
4524 int64_t FirstOffset = IsLargeOffset ? 1 : (OffsetValue + 1); in expandUsh() local
4527 std::swap(FirstOffset, SecondOffset); in expandUsh()
4530 TOut.emitRRI(Mips::SB, DstReg, ATReg, FirstOffset, IDLoc, STI); in expandUsh()
4537 TOut.emitRRI(Mips::SB, DstReg, SrcReg, FirstOffset, IDLoc, STI); in expandUsh()
5365 MCOperand &FirstOffset = Inst.getOperand(2); in expandLoadStoreDMacro() local
5366 signed NextOffset = FirstOffset.getImm() + 4; in expandLoadStoreDMacro()
5369 if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset)) in expandLoadStoreDMacro()
5375 TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI); in expandLoadStoreDMacro()
5379 TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI); in expandLoadStoreDMacro()
5412 MCOperand &FirstOffset = Inst.getOperand(2); in expandStoreDM1Macro() local
5413 signed NextOffset = FirstOffset.getImm() + 4; in expandStoreDM1Macro()
5416 if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset)) in expandStoreDM1Macro()
5422 TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI); in expandStoreDM1Macro()