Lines Matching refs:i8
49 addRegisterClass(MVT::i8, &MSP430::GR8RegClass); in MSP430TargetLowering()
61 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
68 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
73 setTruncStoreAction(MVT::i16, MVT::i8, Expand); in MSP430TargetLowering()
75 setOperationAction(ISD::SRA, MVT::i8, Custom); in MSP430TargetLowering()
76 setOperationAction(ISD::SHL, MVT::i8, Custom); in MSP430TargetLowering()
77 setOperationAction(ISD::SRL, MVT::i8, Custom); in MSP430TargetLowering()
81 setOperationAction(ISD::ROTL, MVT::i8, Expand); in MSP430TargetLowering()
82 setOperationAction(ISD::ROTR, MVT::i8, Expand); in MSP430TargetLowering()
89 setOperationAction(ISD::BR_CC, MVT::i8, Custom); in MSP430TargetLowering()
92 setOperationAction(ISD::SETCC, MVT::i8, Custom); in MSP430TargetLowering()
94 setOperationAction(ISD::SELECT, MVT::i8, Expand); in MSP430TargetLowering()
96 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in MSP430TargetLowering()
99 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i8, Expand); in MSP430TargetLowering()
104 setOperationAction(ISD::CTTZ, MVT::i8, Expand); in MSP430TargetLowering()
106 setOperationAction(ISD::CTLZ, MVT::i8, Expand); in MSP430TargetLowering()
108 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering()
111 setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
113 setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
115 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand); in MSP430TargetLowering()
121 setOperationAction(ISD::MUL, MVT::i8, Promote); in MSP430TargetLowering()
122 setOperationAction(ISD::MULHS, MVT::i8, Promote); in MSP430TargetLowering()
123 setOperationAction(ISD::MULHU, MVT::i8, Promote); in MSP430TargetLowering()
124 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
125 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Promote); in MSP430TargetLowering()
132 setOperationAction(ISD::UDIV, MVT::i8, Promote); in MSP430TargetLowering()
133 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
134 setOperationAction(ISD::UREM, MVT::i8, Promote); in MSP430TargetLowering()
135 setOperationAction(ISD::SDIV, MVT::i8, Promote); in MSP430TargetLowering()
136 setOperationAction(ISD::SDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
137 setOperationAction(ISD::SREM, MVT::i8, Promote); in MSP430TargetLowering()
402 if (VT == MVT::i8) in getRegForInlineAsmConstraint()
505 if (LocVT == MVT::i8) { in AnalyzeArguments()
981 Victim = DAG.getZeroExtendInReg(Victim, dl, MVT::i8); in LowerShifts()
990 DAG.getValueType(MVT::i8)) in LowerShifts()
991 : DAG.getZeroExtendInReg(Victim, dl, MVT::i8); in LowerShifts()
1123 TargetCC = DAG.getConstant(TCC, dl, MVT::i8); in EmitCMP()
1344 if (VT != MVT::i8 && VT != MVT::i16) in getPostIndexedAddressParts()
1353 (VT == MVT::i8 && RHSC != 1)) in getPostIndexedAddressParts()
1409 return false && VT1 == MVT::i8 && VT2 == MVT::i16; in isZExtFree()