Lines Matching refs:SDTCisVT
22 def MxSDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
23 def MxSDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
25 def MxSDT_Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
28 /* ADJ */ SDTCisVT<0, i32>
31 def MxSDT_TCRet : SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisVT<1, i32>]>;
37 /* CCR */ SDTCisVT<1, i8>,
44 /* CCR */ SDTCisVT<1, i8>,
52 /* CCR */ SDTCisVT<1, i8>,
59 /* CCR */ SDTCisVT<0, i8>,
66 /* Cond */ SDTCisVT<3, i8>,
67 /* CCR */ SDTCisVT<4, i8>
71 /* Dest */ SDTCisVT<0, OtherVT>,
72 /* Cond */ SDTCisVT<1, i8>,
73 /* CCR */ SDTCisVT<2, i8>
77 /* BOOL */ SDTCisVT<0, i8>,
78 /* Cond */ SDTCisVT<1, i8>,
79 /* CCR */ SDTCisVT<2, i8>
84 /* Cond */ SDTCisVT<1, i8>,
85 /* CCR */ SDTCisVT<2, i8>
90 /* MEM */ SDTCisVT<0, iPTR>,
91 /* SIZE */ SDTCisVT<1, iPTR>