Lines Matching +full:low +full:- +full:vt
1 //===-- M68kInstrInfo.td - Main M68k Instruction Definition -*- tablegen -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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25 def MxSDT_Call : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
27 def MxSDT_Ret : SDTypeProfile<0, -1, [
41 // RES, CCR <- op LHS, RHS
49 // RES, CCR <- op LHS, RHS, CCR
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183 class MxOperand<ValueType vt, MxSize size, string letter, RegisterClass rc, dag pat = (null_frag)> {
184 ValueType VT = vt;
191 class MxRegOp<ValueType vt,
197 MxOperand<vt, size, letter, rc> {
258 // a data reference with the exception of the jump and jump-to-subroutine
297 // the address register and the sign-extended 16-bit displacement integer in the
299 // exception of the jump and jump-to-subroutine instructions.
309 // address register, the signextended displacement integer in the low order eight
312 // jump and jump-to-subroutine instructions
321 // The address of the operand is the extension word. The 16-bit address is sign
323 // with the exception of the jump and jump-tosubroutine instructions.
327 // before other larger-width variants.
339 // words. The high order part of the address is the first extension word; the low
342 // to-subroutine instructions.
355 // counter and the Sign-extended 16-bit displacement integer in the extension
362 // sign-extended displacement integer in the lower eight bits of the extension
377 class MxOp<ValueType vt, MxSize size, string letter>
378 : Operand<vt>,
379 MxOperand<vt, size, letter, ?> {
387 // Byte Operation - operand is low order byte of extension word
388 // Word Operation - operand is extension word
389 // Long Word Operation - operand is in the two extension words,
391 // extension word, low order 16 bits are
403 // Branch targets have OtherVT type and print as pc-relative values.
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431 def AtLeastM680 # i # "0" : Predicate<"Subtarget->atLeastM680"#i#"0()">,
434 def AtLeastM68881 : Predicate<"Subtarget->atLeastM68881()">,
436 def AtLeastM68882 : Predicate<"Subtarget->atLeastM68882()">,
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503 def MximmSExt8 : PatLeaf<(imm), [{ return isInt<8>(N->getSExtValue()); }]>;
506 def MximmSExt16 : PatLeaf<(imm), [{ return isInt<16>(N->getSExtValue()); }]>;
509 def MximmSExt32 : PatLeaf<(imm), [{ return isInt<32>(N->getSExtValue()); }]>;
523 // known to be 32-bit aligned or better. Ditto for i8 to i16.
526 ISD::LoadExtType ExtType = LD->getExtensionType();
530 return LD->getAlign() >= 2 && !LD->isSimple();
536 ISD::LoadExtType ExtType = LD->getExtensionType();
540 return LD->getAlign() >= 4 && !LD->isSimple();
565 //===----------------------------------------------------------------------===//
569 //===----------------------------------------------------------------------===//
573 // vt: Type of data this fixture refers to
576 class MxType<ValueType vt, string prefix, string postfix,
609 int Size = vt.Size;
610 ValueType VT = vt;
661 // replace MxType-based operand factoring.
675 // -(An)
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