666                                 MCRegister SrcReg, bool KillSrc) const {  in copyPhysReg()  argument
670   if (M68k::XR32RegClass.contains(DstReg, SrcReg))  in copyPhysReg()
672   else if (M68k::XR16RegClass.contains(DstReg, SrcReg))  in copyPhysReg()
674   else if (M68k::DR8RegClass.contains(DstReg, SrcReg))  in copyPhysReg()
679         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
690   if (M68k::DR8RegClass.contains(SrcReg)) {  in copyPhysReg()
695   } else if (M68k::XR16RegClass.contains(SrcReg) &&  in copyPhysReg()
701         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
705   bool FromCCR = SrcReg == M68k::CCR;  in copyPhysReg()
706   bool FromSR = SrcReg == M68k::SR;  in copyPhysReg()
715     assert(M68k::DR8RegClass.contains(SrcReg) &&  in copyPhysReg()
723         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
727   LLVM_DEBUG(dbgs() << "Cannot copy " << RI.getName(SrcReg) << " to "  in copyPhysReg()
755 unsigned getStoreRegOpcode(unsigned SrcReg, const TargetRegisterClass *RC,  in getStoreRegOpcode()  argument
758   return getLoadStoreRegOpcode(SrcReg, RC, TRI, STI, false);  in getStoreRegOpcode()
779     MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,  in storeRegToStackSlot()  argument
787   unsigned Opc = getStoreRegOpcode(SrcReg, RC, TRI, Subtarget);  in storeRegToStackSlot()
791       .addReg(SrcReg, getKillRegState(IsKill));  in storeRegToStackSlot()