Lines Matching full:scale
21 /// 10 M68000 (d8,An,Xn.L) f address register indirect with index and scale = 1
22 /// 07 M68000 (d8,An,Xn.W) F address register indirect with index and scale = 1
23 /// 12 M68020 (d8,An,Xn.L,SCALE) g address register indirect with index
24 /// 11 M68020 (d8,An,Xn.W,SCALE) G address register indirect with index
25 /// 14 M68020 ([bd,An],Xn.L,SCALE,od) u memory indirect postindexed mode
26 /// 13 M68020 ([bd,An],Xn.W,SCALE,od) U memory indirect postindexed mode
27 /// 16 M68020 ([bd,An,Xn.L,SCALE],od) v memory indirect preindexed mode
28 /// 15 M68020 ([bd,An,Xn.W,SCALE],od) V memory indirect preindexed mode
32 /// 23 M68000 (d8,PC,Xn.L) k program counter with index and scale = 1
33 /// 22 M68000 (d8,PC,Xn.W) K program counter with index and scale = 1
34 /// 25 M68020 (d8,PC,Xn.L,SCALE) l program counter with index
35 /// 24 M68020 (d8,PC,Xn.W,SCALE) L program counter with index
36 /// 27 M68020 ([bd,PC],Xn.L,SCALE,od) x program counter memory indirect postindexed mode
37 /// 26 M68020 ([bd,PC],Xn.W,SCALE,od) X program counter memory indirect postindexed mode
38 /// 31 M68020 ([bd,PC,Xn.L,SCALE],od) y program counter memory indirect preindexed mode
39 /// 30 M68020 ([bd,PC,Xn.W,SCALE],od) Y program counter memory indirect preindexed mode
78 bit size_w_l = false, int scale = 1,
85 // SCALE
87 !eq(scale, 1) : 0b00,
88 !eq(scale, 2) : 0b01,
89 !eq(scale, 4) : 0b10,
90 !eq(scale, 8) : 0b11
118 /*W/L*/true, /*SCALE*/1,
145 /*W/L*/true, /*SCALE*/1,