Lines Matching +refs:cc +refs:with
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
101 /*REGISTER prefixed with D/A bit*/(operand "$dst", 4));
115 foreach cc = [ "cc", "ls", "lt", "eq", "mi", "f", "ne", "ge",
117 def SET#"d8"#cc : MxSccR<cc>;
118 def SET#"j8"#cc : MxSccM<cc, MxType8.JOp, MxType8.JPat, MxEncAddrMode_j<"dst">>;
119 def SET#"p8"#cc : MxSccM<cc, MxType8.POp, MxType8.PPat, MxEncAddrMode_p<"dst">>;
164 class MxBcc<string cc, Operand TARGET, dag disp_8, dag disp_16_32>
165 : MxInst<(outs), (ins TARGET:$dst), "b"#cc#"\t$dst", []> {
166 // FIXME: If we want to avoid supplying disp_16_32 with empty
170 // class MxBcc<string cc, Operand TARGET, int SIZE>
179 (descend 0b0110, !cast<MxEncCondOp>("MxCC"#cc).Value, disp_8),
184 foreach cc = [ "cc", "ls", "lt", "eq", "mi", "ne", "ge",
186 def B#cc#"8"
187 : MxBcc<cc, MxBrTarget8,
190 def B#cc#"16"
191 : MxBcc<cc, MxBrTarget16, (descend 0b0000, 0b0000),
195 foreach cc = [ "cc", "ls", "lt", "eq", "mi", "ne", "ge",
197 def : Pat<(MxBrCond bb:$target, !cast<PatLeaf>("MxCOND"#cc), CCR),
198 (!cast<Instruction>("B"#cc#"8") MxBrTarget8:$target)>;
345 // FIXME These are pseudo ops that should be replaced with Pat<> patterns.
365 // this happens, it is great. However, if we are left with an 8-bit subx and an