Lines Matching refs:SETCC
129 setOperationAction(ISD::SETCC, VT, Custom); in M68kTargetLowering()
1389 case ISD::SETCC: in LowerOperation()
1644 Overflow = DAG.getNode(M68kISD::SETCC, DL, N->getValueType(1), in LowerXALUO()
1670 return DAG.getNode(M68kISD::SETCC, DL, MVT::i8, in getBitTestCondition()
1860 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC && in hasNonFlagsUse()
2172 if (Op0.getOpcode() == M68kISD::SETCC) { in LowerSETCC()
2180 DAG.getNode(M68kISD::SETCC, DL, MVT::i8, in LowerSETCC()
2204 return DAG.getNode(M68kISD::SETCC, DL, MVT::i8, in LowerSETCC()
2228 return DAG.getNode(M68kISD::SETCC, DL, MVT::i8, in LowerSETCCCARRY()
2268 if (Cond.getOpcode() == ISD::SETCC) { in LowerSELECT()
2277 if (Cond.getOpcode() == M68kISD::SETCC && in LowerSELECT()
2332 if (CondOpcode == M68kISD::SETCC || CondOpcode == M68kISD::SETCC_CARRY) { in LowerSELECT()
2445 return Op.getOperand(0).getOpcode() == M68kISD::SETCC && in isXor1OfSetCC()
2459 if (Cond.getOpcode() == ISD::SETCC) { in LowerBRCOND()
2485 if (CondOpcode == M68kISD::SETCC || CondOpcode == M68kISD::SETCC_CARRY) { in LowerBRCOND()
3532 return DAG.getNode(M68kISD::SETCC, dl, MVT::i8, in getSETCC()
3549 if (Carry.getOpcode() == M68kISD::SETCC || in combineCarryThroughADD()
3636 case M68kISD::SETCC: in PerformDAGCombine()
3686 case M68kISD::SETCC: in getTargetNodeName()