42                                      MCRegister SrcReg, bool KillSrc) const {  in copyPhysReg()  argument
43   if (LoongArch::GPRRegClass.contains(DstReg, SrcReg)) {  in copyPhysReg()
45         .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
51   if (LoongArch::LSX128RegClass.contains(DstReg, SrcReg)) {  in copyPhysReg()
53         .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
59   if (LoongArch::LASX256RegClass.contains(DstReg, SrcReg)) {  in copyPhysReg()
61         .addReg(SrcReg, getKillRegState(KillSrc))  in copyPhysReg()
68       LoongArch::GPRRegClass.contains(SrcReg)) {  in copyPhysReg()
70         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
75       LoongArch::CFRRegClass.contains(SrcReg)) {  in copyPhysReg()
77         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
81   if (LoongArch::CFRRegClass.contains(DstReg, SrcReg)) {  in copyPhysReg()
83         .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
89   if (LoongArch::FPR32RegClass.contains(DstReg, SrcReg)) {  in copyPhysReg()
91   } else if (LoongArch::FPR64RegClass.contains(DstReg, SrcReg)) {  in copyPhysReg()
94              LoongArch::FPR32RegClass.contains(SrcReg)) {  in copyPhysReg()
98              LoongArch::FPR64RegClass.contains(SrcReg)) {  in copyPhysReg()
107       .addReg(SrcReg, getKillRegState(KillSrc));  in copyPhysReg()
111     MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register SrcReg,  in storeRegToStackSlot()  argument
140       .addReg(SrcReg, getKillRegState(IsKill))  in storeRegToStackSlot()
187   Register SrcReg = LoongArch::R0;  in movImm()  local
207           .addReg(SrcReg, RegState::Kill)  in movImm()
216     SrcReg = DstReg;  in movImm()