Lines Matching defs:DL
464 static SDValue lowerVECTOR_SHUFFLE_VREPLVEI(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VREPLVEI()
506 static SDValue lowerVECTOR_SHUFFLE_VSHUF4I(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VSHUF4I()
569 static SDValue lowerVECTOR_SHUFFLE_VPACKEV(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VPACKEV()
609 static SDValue lowerVECTOR_SHUFFLE_VPACKOD(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VPACKOD()
650 static SDValue lowerVECTOR_SHUFFLE_VILVH(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VILVH()
693 static SDValue lowerVECTOR_SHUFFLE_VILVL(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VILVL()
733 static SDValue lowerVECTOR_SHUFFLE_VPICKEV(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VPICKEV()
775 static SDValue lowerVECTOR_SHUFFLE_VPICKOD(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VPICKOD()
805 static SDValue lowerVECTOR_SHUFFLE_VSHUF(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_VSHUF()
830 static SDValue lower128BitShuffle(const SDLoc &DL, ArrayRef<int> Mask, MVT VT, in lower128BitShuffle()
883 static SDValue lowerVECTOR_SHUFFLE_XVREPLVEI(const SDLoc &DL, in lowerVECTOR_SHUFFLE_XVREPLVEI()
915 static SDValue lowerVECTOR_SHUFFLE_XVSHUF4I(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVSHUF4I()
926 static SDValue lowerVECTOR_SHUFFLE_XVPACKEV(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVPACKEV()
933 static SDValue lowerVECTOR_SHUFFLE_XVPACKOD(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVPACKOD()
940 static SDValue lowerVECTOR_SHUFFLE_XVILVH(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVILVH()
979 static SDValue lowerVECTOR_SHUFFLE_XVILVL(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVILVL()
1013 static SDValue lowerVECTOR_SHUFFLE_XVPICKEV(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVPICKEV()
1048 static SDValue lowerVECTOR_SHUFFLE_XVPICKOD(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVPICKOD()
1084 static SDValue lowerVECTOR_SHUFFLE_XVSHUF(const SDLoc &DL, ArrayRef<int> Mask, in lowerVECTOR_SHUFFLE_XVSHUF()
1152 static void canonicalizeShuffleVectorByLane(const SDLoc &DL, in canonicalizeShuffleVectorByLane()
1255 static SDValue lower256BitShuffle(const SDLoc &DL, ArrayRef<int> Mask, MVT VT, in lower256BitShuffle()
1313 SDLoc DL(Op); in lowerVECTOR_SHUFFLE() local
1376 SDLoc DL(Op); in lowerBUILD_VECTOR() local
1474 SDLoc DL(Op); in lowerATOMIC_FENCE() local
1518 SDLoc DL(Op); in lowerFRAMEADDR() local
1569 SDLoc DL(Op); in lowerVASTART() local
1585 SDLoc DL(Op); in lowerUINT_TO_FP() local
1619 SDLoc DL(Op); in lowerSINT_TO_FP() local
1642 SDLoc DL(Op); in lowerBITCAST() local
1656 SDLoc DL(Op); in lowerFP_TO_SINT() local
1670 static SDValue getTargetNode(GlobalAddressSDNode *N, SDLoc DL, EVT Ty, in getTargetNode()
1675 static SDValue getTargetNode(BlockAddressSDNode *N, SDLoc DL, EVT Ty, in getTargetNode()
1681 static SDValue getTargetNode(ConstantPoolSDNode *N, SDLoc DL, EVT Ty, in getTargetNode()
1687 static SDValue getTargetNode(JumpTableSDNode *N, SDLoc DL, EVT Ty, in getTargetNode()
1696 SDLoc DL(N); in getAddr() local
1793 SDLoc DL(N); in getStaticTLSAddr() local
1824 SDLoc DL(N); in getDynamicTLSAddr() local
1858 SDLoc DL(N); in getTLSDescAddr() local
1950 SDLoc DL(Op); in lowerINTRINSIC_WO_CHAIN() local
2239 SDLoc DL(Op); in lowerINTRINSIC_W_CHAIN() local
2360 SDLoc DL(Op); in lowerINTRINSIC_VOID() local
2526 SDLoc DL(Op); in lowerShiftLeftParts() local
2566 SDLoc DL(Op); in lowerShiftRightParts() local
2649 SDLoc DL(N); in customLegalizeToWOp() local
2682 SDLoc DL(N); in customLegalizeToWOpWithSExt() local
2715 SDLoc DL(Node); in replaceVPICKVE2GRResults() local
2731 SDLoc DL(N); in replaceVecCondBranchResults() local
2809 SDLoc DL(N); in ReplaceNodeResults() local
3113 SDLoc DL(N); in performANDCombine() local
3204 SDLoc DL(N); in performSRLCombine() local
3237 SDLoc DL(N); in performORCombine() local
3633 SDLoc DL(Node); in legalizeIntrinsicImmArg() local
3648 SDLoc DL(Node); in lowerVectorSplatImm() local
3666 SDLoc DL(Node); in truncateVecElts() local
3674 SDLoc DL(Node); in lowerVectorBitClear() local
3686 SDLoc DL(Node); in lowerVectorBitClearImm() local
3704 SDLoc DL(Node); in lowerVectorBitSetImm() local
3721 SDLoc DL(Node); in lowerVectorBitRevImm() local
3740 SDLoc DL(N); in performINTRINSIC_WO_CHAINCombine() local
4278 DebugLoc DL = MI.getDebugLoc(); in insertDivByZeroTrap() local
4372 DebugLoc DL = MI.getDebugLoc(); in emitVecCondBranchPseudo() local
4446 DebugLoc DL = MI.getDebugLoc(); in emitPseudoXVINSGR2VR() local
4494 DebugLoc DL = MI.getDebugLoc(); in EmitInstrWithCustomInserter() local
4716 static bool CC_LoongArch(const DataLayout &DL, LoongArchABI::ABI ABI, in CC_LoongArch()
4911 const CCValAssign &VA, const SDLoc &DL) { in convertLocVTToValVT()
4929 const CCValAssign &VA, const SDLoc &DL, in unpackFromRegLoc()
4962 const CCValAssign &VA, const SDLoc &DL) { in unpackFromMemLoc()
4987 const CCValAssign &VA, const SDLoc &DL) { in convertValVTToLocVT()
5050 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
5268 SDLoc &DL = CLI.DL; in LowerCall() local
5537 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, in LowerReturn()
5613 EVT LoongArchTargetLowering::getSetCCResultType(const DataLayout &DL, in getSetCCResultType()
5784 const DataLayout &DL = AI->getDataLayout(); in emitMaskedAtomicRMWIntrinsic() local
6062 bool LoongArchTargetLowering::isLegalAddressingMode(const DataLayout &DL, in isLegalAddressingMode()